CXA2019 查看數據表（PDF） - Sony Semiconductor

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CXA2019

NTSC/PAL Chroma Decoder

Sony Semiconductor 

CXA2019AQ

Definition of I2C BUS Registers

Slave Addresses

Slave Receiver

9AH: ADRS = "High"

9EH: ADRS = "Low"

Slave Transmitter

9BH: ADRS = "High"

9FH: ADRS = "Low"

Register Table

×: Don't care, ∗: Undefined

Control Register

Sub Address

×××× 0000

×××× 0001

×××× 0010

×××× 0011

×××× 0100

×××× 0101

×××× 0110

×××× 0111

×××× 1000

×××× 1001

×××× 1010

×××× 1011

×××× 1100

bit7

bit6

bit5

bit4

HUE

COLOR

SHARPNESS

SUB HUE

CTRAPADJ

Y DRIVE

U PED

U2 PED

Y2 DRIVE

U2 DRIVE

V2 DRIVE

COL SYSTEM

COL LOOP

X'TAL PIN

SCP BGF

bit3

bit2

bit1

bit0

DPIC OFF CV/YC

HMASK CANAL

SUB CONT

SUB COLOR

AFC

TRAP ON TOT ON

SHP-f0 FSC OUT CD MODE2

V PED

V2 PED

DC TRAN

PRE OVER ABL OFF

ABL CENT

ABL

V FREQ

DELAY

SCP BGR

EXT COLOR 1

Status Register

bit7

bit6

bit5

bit4

bit3

bit2

bit1

bit0

H LOCK KILLER NT/PAL 50/60 SECAM VCO-F

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