CY2308 查看數據表（PDF） - Cypress Semiconductor
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CY2308 Datasheet PDF : 14 Pages
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CY2308
Typical Duty Cycle[10] and IDD Trends[11] for CY2308–1,2,3,4
Duty Cycle Vs VDD
(for 30 pF Loads over Frequency - 3.3V, 25C)
60
58
56
54
52
50
48
46
44
42
40
3
3.1
3.2
3.3
3.4
3.5
3.6
VDD (V)
33 MHz
66 MHz
100 MHz
Duty Cycle Vs VDD
(for 15 pF Loads over Frequency - 3.3V, 25C)
60
58
56
54
52
33 MHz
66 MHz
50
100 MHz
48
133 MHz
46
44
42
40
3
3.1
3.2
3.3
3.4
3.5
3.6
VDD (V)
Duty Cycle Vs Frequency
(for 30 pF Loads over Temperature - 3.3V)
60
58
56
54
-40C
52
0C
50
25C
48
70C
46
85C
44
42
40
20
40
60
80
100
120
140
Frequency (MHz)
Duty Cycle Vs Frequency
(for 15 pF Loads over Temperature - 3.3V)
60
58
56
54
52
50
48
46
44
42
40
20
40
60
80
100
120
140
Frequency (MHz)
-40C
0C
25C
70C
85C
IDD vs Number of Loaded Outputs
(for 30 pF Loads over Frequency - 3.3V, 25C)
140
120
100
80
60
40
20
0
0
2
4
6
8
N umb er o f Lo ad ed Out p ut s
33 M Hz
66 M Hz
100 M Hz
IDD vs Number of Loaded Outputs
(for 15 pF Loads over Frequency - 3.3V, 25C)
140
120
100
80
60
40
20
0
0
2
4
6
8
N umb er o f Lo ad ed Out p ut s
33 M Hz
66 M Hz
100 M Hz
Notes
10. Duty Cycle is taken from typical chip measured at 1.4V.
11. IDD data is calculated from IDD = ICORE + nCVf, where ICORE is the unloaded current.
(n = number of outputs; C = Capacitance load per output (F); V = Voltage Supply (V); f = frequency (Hz).
Document Number: 38-07146 Rev. *F
Page 9 of 14
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