AD7391AR 查看數據表（PDF） - Analog Devices
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AD7391AR Datasheet PDF : 12 Pages
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AD7390/AD7391–SPECIFICATIONS
AD7390 ELECTRICAL CHARACTERISTICS (@ VREF IN = 2.5 V, –40؇C < TA < +85؇C unless otherwise noted.)
Parameter
Symbol Conditions
3 V ؎ 10% 5 V ؎ 10% Unit
STATIC PERFORMANCE
Resolution1
Relative Accuracy2
Differential Nonlinearity2
Zero-Scale Error
Full-Scale Voltage Error
Full-Scale Tempco3
N
INL
INL
DNL
DNL
VZSE
VFSE
VFSE
TCVFS
12
TA = 25°C
± 1.6
TA = Ϫ40°C, ϩ85°C
± 2.0
TA = 25°C, Monotonic
± 0.9
Monotonic
±1
Data = 000H
4.0
TA = 25°C, 85°C, Data = FFFH
±8
TA = Ϫ40°C, Data = FFFH
± 20
16
12
± 1.6
±2
± 0.9
±1
4.0
±8
± 20
16
Bits
LSB max
LSB max
LSB max
LSB max
mV max
mV max
mV max
ppm/°C typ
REFERENCE INPUT
VREF IN Range
Input Resistance
Input Capacitance3
VREF
RREF
CREF
0/VDD
2.5
5
0/VDD
2.5
5
V min/max
MΩ typ4
pF typ
ANALOG OUTPUT
Output Current (Source)
Output Current (Sink)
Capacitive Load3
IOUT
Data = 800H, ∆VOUT = 5 LSB
1
1
IOUT
Data = 800H, ∆VOUT = 5 LSB
3
3
CL
No Oscillation
100
100
mA typ
mA typ
pF typ
LOGIC INPUTS
Logic Input Low Voltage
Logic Input High Voltage
Input Leakage Current
Input Capacitance3
INTERFACE TIMING3, 5
Clock Width High
Clock Width Low
Load Pulsewidth
Data Setup
Data Hold
Clear Pulsewidth
Load Setup
Load Hold
AC CHARACTERISTICS6
Output Slew Rate
Settling Time
DAC Glitch
Digital Feedthrough
Feedthrough
VIL
VIH
IIL
CIL
tCH
tCL
tLDW
tDS
tDH
tCLRW
tLD1
tLD2
SR
tS
Q
Q
VOUT/VREF
Data = 000H to FFFH to 000H
To Ϯ0.1% of Full Scale
Code 7FFH to 800H to 7FFH
VREF = 1.5 VDC ϩ 1 V p-p,
Data = 000H, f = 100 kHz
0.5
VDD Ϫ 0.6
10
10
0.8
VDD Ϫ 0.6
10
10
V max
V min
µA max
pF max
50
30
50
30
30
20
10
10
30
15
15
15
30
15
40
20
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
0.05
0.05
70
60
65
65
15
15
Ϫ63
Ϫ63
V/µs typ
µs typ
nVs typ
nVs typ
dB typ
SUPPLY CHARACTERISTICS
Power Supply Range
Positive Supply Current
Power Dissipation
Power Supply Sensitivity
VDD RANGE
IDD
IDD
PDISS
PSS
DNL < ± 1 LSB
VIL = 0 V, No Load, TA = 25°C
VIL = 0 V, No Load
VIL = 0 V, No Load
∆VDD = ± 5%
2.7/5.5
55
100
300
0.006
2.7/5.5
55
100
500
0.006
V min/max
µA typ
µA max
µW max
%/% max
NOTES
1One LSB = VREF/4096 V for the 12-bit AD7390.
2The first two codes (000H, 001H) are excluded from the linearity error measurement.
3These parameters are guaranteed by design and not subject to production testing.
4Typicals represent average readings measured at 25°C.
5All input control signals are specified with tR = tF = 2 ns (10% to 90% of 3 V) and timed from a voltage level of 1.6 V.
6The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground.
Specifications subject to change without notice.
–2–
REV. A
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