CY7C1339G(2004) 查看數據表（PDF） - Cypress Semiconductor
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CY7C1339G Datasheet PDF : 17 Pages
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PRELIMINARY
CY7C1339G
Electrical Characteristics Over the Operating Range (continued)[9, 10]
Parameter
Description
Test Conditions
Min.
Shaded area contains advanced information.
Notes:
9. Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC) > -2V (Pulse width less than tCYC/2).
10. TPower-up: Assumes a linear ramp from 0v to VDD(min.) within 200ms. During this time VIH < VDD and VDDQ < VDD.
Max.
Unit
Thermal Resistance[11]
Parameter
ΘJA
ΘJC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
Test conditions follow standard test
methods and procedures for
measuring thermal impedance, per
EIA / JESD51.
TQFP
Package
TBD
TBD
BGA
Package
TBD
TBD
Unit
°C/W
°C/W
Capacitance[11]
Parameter
CIN
CCLK
CI/O
Description
Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
VDD = 3.3V.
VDDQ = 3.3V
TQFP
BGA
Package Package Unit
5
5
pF
5
5
pF
5
7
pF
AC Test Loads and Waveforms
3.3V I/O Test Load
OUTPUT
Z0 = 50Ω
3.3V
OUTPUT
RL = 50Ω
5 pF
VT = 1.5V
(a)
INCLUDING
JIG AND
SCOPE
R = 317Ω
R = 351Ω
(b)
2.5V I/O Test Load
OUTPUT
Z0 = 50Ω
2.5V
OUTPUT
RL = 50Ω
5 pF
VT = 1.25V
R = 1667Ω
R =1538Ω
INCLUDING
(a)
JIG AND
SCOPE
(b)
Note:
11. Tested initially and after any design or process change that may affect these parameters
VDDQ
GND
ALL INPUT PULSES
10%
90%
≤ 1ns
(c)
VDDQ
GND
ALL INPUT PULSES
10%
90%
≤ 1ns
(c)
90%
10%
≤ 1ns
90%
10%
≤ 1ns
Document #: 38-05520 Rev. *A
Page 9 of 17
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