DM9161A 查看數據表（PDF） - Davicom Semiconductor, Inc.
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DM9161A Datasheet PDF : 45 Pages
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DM9161A
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
MLT-3 to NRZI decoder. The Clock Recovery Module locks
onto the data stream and extracts the 125MHz reference
clock. The extracted and synchronized clock and data are
presented to the NRZI to NRZ Decoder.
7.2.2.5 NRZI to NRZ
The transmit data stream is required to be NRZI encoded in
for compatibility with the TP-PMD standard for 100Base-TX
transmission over Category-5 unshielded twisted pair cable.
This conversion process must be reversed on the receive
end. The NRZI to NRZ decoder, receives the NRZI data
stream from the Clock Recovery Module and converts
it to a NRZ data stream to be presented to the Serial to
Parallel conversion block.
7.2.2.6 Serial to Parallel
The Serial to Parallel Converter receives a serial data
stream from the NRZI to NRZ converter, and converts
the data stream to parallel data to be presented to the
descrambler.
7.2.2.7 Descrambler
7.2.3 10Base-T Operation
The 10Base-T transceiver is IEEE 802.3u compliant. When
the DM9161A is operating in 10Base-T mode, the coding
scheme is Manchester. Data processed for transmit is
presented to the MII interface in nibble format, converted to a
serial bit stream, then Manchester encoded. When receiving,
the Manchester encoded bit stream is decoded and
converted into nibble format for presentation to the MII
interface.
7.2.4 Collision Detection
For half-duplex operation, a collision is detected when the
transmit and receive channels are active simultaneously.
When a collision has been detected, it will be reported by the
COL signal on the MII interface. Collision detection is
disabled in Full Duplex operation.
7.2.5 Carrier Sense
Carrier Sense (CRS) is asserted in half-duplex operation
during transmission or reception of data. During full-duplex
mode, CRS is asserted only during receive operations.
Because the scrambling process requires to control the
radiated emissions of transmit data streams, the receiver
must descramble the receive data streams. The
descrambler receives scrambled parallel data streams from
the Serial to Parallel converter, descrambles the data
streams, and presents the data streams to the Code Group
alignment block.
7.2.2.8 Code Group Alignment
The Code Group Alignment block receives un-aligned
5B data from the descrambler and converts it into 5B
code group data. Code Group Alignment occurs after
the J/K is detected, and subsequent data is aligned on
a fixed boundary.
7.2.2.9 4B5B Decoder
7.2.6 Auto-Negotiation
The objective of Auto-negotiation is to provide a means to
exchange information between segment linked devices and
to automatically configure both devices to take maximum
advantage of their abilities. It is important to note that
Auto-negotiation does not test the link segment
characteristics. The Auto-Negotiation function provides a
means for a device to advertise supported modes of
operation to a remote link partner, acknowledge the receipt
and understanding of common modes of operation, and to
reject un-shared modes of operation. This allows devices on
both ends of a segment to establish a link at the best
common mode of operation. If more than one common
mode exists between the two devices, a mechanism is
provided to allow the devices to resolve to a single mode of
operation using a predetermined priority resolution function.
The 4B5B Decoder functions as a look-up table that
translates incoming 5B code groups into 4B (Nibble) data.
When receiving a frame, the first 2 5-bit code groups
received are the start-of-frame delimiter (J/K symbols). The
J/K symbol pair is stripped and two nibbles of preamble
pattern are substituted. The last two code groups are the
end-of-frame delimiter (T/R symbols).
The T/R symbol pair is also stripped from the nibble
presented to the Reconciliation layer.
19
Final
Version: DM9161A-DS-F01
October 16, 2009
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