EP9315 查看數據表（PDF） - Cirrus Logic

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EP9315

Enhanced Universal Platform System-on-Chip Processor

Cirrus Logic 

EP9315

Enhanced Universal Platform SOC Processor

Static Memory Single Word Write Cycle

Parameter

AD setup to WRn assert time

AD hold from WRn deassert time

WRn deassert to CSn deassert time

CSn to WRn assert delay time

WRn assert time

CSn to DQMn assert delay time

WRn deassert to DA transition time

WRn assert to DA valid

Symbol

tADs

tADh

tCSh

tWRd

tWRpw

tDQMd

tDAh

tDAV

Min

- tHCLK 3

tHCLK × 2

7

-

-

-

tHCLK

-

Typ

-

-

-

-

tHCLK × (WST1 + 1)

-

-

-

Max

-

-

-

2

-

1

-

8

Unit

ns

ns

ns

ns

ns

ns

ns

ns

AD

CSn

WRn

RDn

DQMn

DA

WAIT

tADs

tWRd

tWRpw

tCSh

tDQMd

tDAV

tADh

tDAh

Figure 7. Static Memory Single Word Write Cycle Timing Measurement

20

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