HD74LS645FPEL 查看數據表（PDF） - Renesas Electronics
零件编号
产品描述 (功能)
比赛名单
HD74LS645FPEL Datasheet PDF : 7 Pages
| |||
HD74LS645
Octal Bus Transceivers (non-inverted 3-state outputs)
REJ03D0491–0200
Rev.2.00
Feb.18.2005
This octal bus transceivers is designed for asynchronous two-way communication between data buses. The devices
transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction
control (DIR) input. The enable input (G) can be used to disable the device so that the buses are effectively isolated.
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS645P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
PRSP0020DD-B
HD74LS645FPEL SOP-20 pin (JEITA)
(FP-20DAV)
FP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Pin Arrangement
DIR 1
1A 2
2A 3
3A 4
4A 5
5A 6
6A 7
7A 8
8A 9
GND 10
20 VCC
19 Enable G
18 1B
17 2B
16 3B
15 4B
14 5B
13 6B
12 7B
11 8B
(Top view)
Function Table
Note:
Enable
G
L
L
H
H; high level, L; low level, X; irrelevant
Direction Control
DIR
L
H
X
Rev.2.00, Feb.18.2005, page 1 of 6
Operation
B data to A bus
A data to B bus
Isolation
Share Link: 