HD74LS645FPEL 查看數據表（PDF） - Renesas Electronics

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HD74LS645FPEL

Octal Bus Transceivers (non-inverted 3-state outputs)

Renesas Electronics 

HD74LS645

Testing Method

Test Circuit

4.5V

Input

P.G.

Zout = 50Ω

VCC

G

DIR

RL

Output

S1

1A S3

1B

5kΩ

S2

CL

Notes:

1. CL includes prove and jig capacitance.

2. 2A-2B, 3A-3B, 4A-4B, 5A-5B, 6A-6B, 7A-7B, 8A-8B, are identical to abobe load circuit.

3. S3 is a input-output switch.

4. All diodes are 1S2074(H).

Waveforms 1

Input A

(or B)

tTLH

90 %

1.3 V

10 %

tTHL

3V

90 %

1.3 V

10 %

0V

tPLH

Output B

(or A)

1.3 V

tPHL

S1, S2 close

Note: Input pulse: tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%

VOH

1.3 V

VOL

Rev.2.00, Feb.18.2005, page 4 of 6

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