IDT7008S 查看數據表（PDF） - Integrated Device Technology
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IDT7008S Datasheet PDF : 19 Pages
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IDT7008S/L
High-Speed 64K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Waveform of BUSY Arbitration Controlled by CE Timing(1,3) (M/S = VIH)
ADDR"A"
and "B"
ADDRESSES MATCH
CE"A"
CE"B"
BUSY"B"
tAPS (2)
tBAC
tBDC
3198 drw 15
Waveform of BUSY Arbitration Cycle Controlled by Address Match
Timing(1) (M/S = VIH)
ADDR"A"
ADDR"B"
BUSY"B"
ADDRESS "N"
tAPS (2)
MATCHING ADDRESS "N"
tBAA
tBDA
3198 drw 16
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.
2. If tAPS is not satisfied, the BUSY signal will be asserted on one side or another but there is no guarantee on which side BUSY will be asserted.
3. Refer to Chip Enable Truth Table.
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range(1,2)
7008X20
Com'l Only
7008X25
Com'l &
Military
7008X35
Com'l &
Military
Symbol
Parameter
Min. Max. Min. Max. Min. Max.
INTERRUPT TIMING
tAS
Address Set-up Time
0
____
0
____
0
____
tWR
Write Recovery Time
0
____
0
____
0
____
tINS
Interrupt Set Time
____
20
____
20
____
25
tINR
Interrupt Reset Time
____
20
____
20
____
25
NOTES:
1. 'X' in part numbers indicates power rating (S or L).
2. Industrial Temperature: for other speeds, packages and powers contact your sales office.
7008X55
Com'l, Ind
& Military
Min. Max. Unit
0
____
ns
0
____
ns
____
40
ns
____
40
ns
3198 tbl 15
14
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