IDT54FCT245AD 查看數據表（PDF） - Integrated Device Technology
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IDT54FCT245AD Datasheet PDF : 6 Pages
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IDT54/74FCT3245/A
3.3V CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
6V
V CC
Open
V IN
Pulse
Generator
D.U.T.
RT
V OUT
GND
500Ω
50pF
500Ω
CL
2650 drw 04
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
Switch
6V
GND
All Other tests
Open
DEFINITIONS:
2650 lnk 08
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
DATA
INPUT
TIMING
tSU
tH
3V
1.5V
0V
3V
LOW-HIGH-LOW
PULSE
1.5V
INPUT
1.5V
ASYNCHRONOUS CONTROL
PRESET
tREM
0V
3V
tW
CLEAR
ETC.
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
tSU
tH
3V
1.5V
0V
2650 drw 06
ETC.
2650 drw 05
PROPAGATION DELAY
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
tPHL
OPPOSITE PHASE
INPUT TRANSITION
ENABLE AND DISABLE TIMES
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
2650 drw 07
ENABLE
DISABLE
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
tPZL
SWITCH
6V
tPZH
OUTPUT
NORMALLY
HIGH
SWITCH
GND
3V
1.5V
0V
tPLZ
3V
1.5V
tPHZ
1.5V
3V
0.3V VOL
0.3V VOH
0V
0V
NOTES:
2650 drw 08
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
3. If VCC is below 3V, input voltage swings should be adjusted not to exceed
VCC.
8.12
5
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