IDT79RV3081-40 查看數據表（PDF） - Integrated Device Technology

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IDT79RV3081-40

RISController with FPA

Integrated Device Technology 

IDT79R3081 RISController

MILITARY AND COMMERCIAL TEMPERATURE RANGES

ØCA

Airflow (ft/min) 0

200 400 600 800 1000

"MJ" Package* 22 14 12 11 9

8

PLCC Package 29 26 21 18 16 15

2889 tbl 01

Table 1. Thermal Resistance (ØCA) at Various Airflows

(*estimated: final values tbd)

NOTES ON SYSTEM DESIGN

The R3081 has been designed to simplify the task of high-

speed system design. Thus, set-up and hold-time requirements

have been kept to a minimum, allowing a wide variety of

system interface strategies.

To minimize these AC parameters, the R3081 employs

feedback from its SysClk output to the internal bus interface

unit. This allows the R3081 to reference input signals to the

reference clock seen by the external system. The SysClk

output is designed to provide relatively large AC drive to

minimize skew due to slow rise or fall times. A typical part will

have less than 2ns rise or fall (10% to 90% signal times) when

driving the test load.

Therefore, the system designer should use care when

designing for direct SysClk use. Total loading (due to devices

connected on the signal net and the routing of the net itself)

should be minimized to ensure the SysClk output has a

smooth and rapid transition. Long rise and/or fall times may

cause a degradation in the speed capability of an individual

device.

Similarly, the R3081 employs feedback on its ALE output to

ensure adequate address hold time to ALE. The system

designer should be careful when designing the ALE net to

minimize total loading and to minimize skew between ALE and

the A/D bus, which will ensure adequate address access latch

time.

IDT's field and factory applications groups can provide the

system designer with assistance for these and other design

issues.

5.5

8

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