IDT82V2058(2004) 查看數據表（PDF） - Integrated Device Technology
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IDT82V2058 Datasheet PDF : 52 Pages
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IDT82V2058 OCTAL E1 SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL TEMPERATURE RANGES
PIN DESCRIPTION (CONTINUED)
Name
SCLK
/ALE
/AS
Type
Pin No.
QFP144 BGA160
Description
I
86
J12 SCLK: Shift Clock
In serial host mode, the signal on this pin is the shift clock for the serial interface. Data on pin SDO is
clocked out on falling edges of SCLK if pin CLKE is Low, or on rising edges of SCLK if pin CLKE is
High. Data on pin SDI is always sampled on rising edges of SCLK.
ALE: Address Latch Enable
In parallel Intel multiplexed host mode, the address on AD[4:0] is sampled into the device on falling
edges of ALE (Signals on AD[7:5] are ignored). In non-multiplexed host mode, ALE should be pulled
High.
AS: Address Strobe (Active Low)
In parallel Motorola multiplexed host mode, the address on AD[4:0] is latched into the device on falling
edges of AS (Signals on AD[7:5] are ignored). In non-multiplexed host mode, AS should be pulled
High.
RD/R/W
I
(Note: This pin is ignored in hardware control mode.)
85
J13 RD: Read Strobe (Active Low)
In parallel Intel multiplexed or non-multiplexed host mode, this pin is active low for read operation.
R/W: Read/Write Select
In parallel Motorola multiplexed or non-multiplexed host mode, the pin is active low for write operation
and high for read operation.
(Note: This pin is ignored in hardware control mode)
SDI
I
84
J14 SDI: Serial Data Input
/WR
In serial host mode, this pin input the data to the serial interface. Data on this pin is sampled on rising
/DS
edges of SCLK.
WR: Write Strobe (Active Low)
In parallel Intel host mode, this pin is active low during write operation. The data on D[7:0] (in non-
multiplexed mode) or AD[7:0] (in multiplexed mode) is sampled into the device on rising edges of WR.
DS: Data Strobe (Active Low)
In parallel Motorola host mode, this pin is active low. During a write operation (R/W = 0), the data on
D[7:0] (in non-multiplexed mode) or AD[7:0] (in multiplexed mode) is sampled into the device on rising
edges of DS. During a read operation (R/W=1), the data is driven to D[7:0] (in non-multiplexed mode)
or AD[7:0] (in multiplexed mode) by the device on rising edges of DS.
In parallel Motorola non-multiplexed host mode, the address information on the 5 bits of address bus
A[4:0] are latched into the device on the falling edge of DS.
(Note: This pin is ignored in hardware control mode)
SDO
O
83 K14 SDO: Serial Data Output
/RDY
In serial host mode, the data is output on this pin. In serial write operation, SDO is always in High
/ACK
impedance. In serial read operation, SDO is in High impedance only when SDI is in
address/command byte. Data on pin SDO is clocked out of the device on falling edges of SCLK if pin
CLKE is Low, or on rising edges of SCLK if pin CLKE is High.
RDY: Ready Output
In parallel Intel host mode, the high level of this pin reports to the host that bus cycle can be
completed, while low reports the host must insert wait states.
ACK: Acknowledge Output (Active Low)
In parallel Motorola host mode, the low level of this pin indicates that valid information on the data bus
is ready for a read operation or acknowledges the acceptance of the written data during a write
operation.
8
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