IDT82V2084 查看數據表（PDF） - Integrated Device Technology

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IDT82V2084

QUAD CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT

Integrated Device Technology 

QUAD CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT

INDUSTRIAL

TEMPERATURE RANGES

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MAINT2: Maintenance Function Control Register 2...................................................... 43

MAINT3: Maintenance Function Control Register 3...................................................... 43

MAINT4: Maintenance Function Control Register 4...................................................... 44

MAINT5: Maintenance Function Control Register 5...................................................... 44

MAINT6: Maintenance Function Control Register 6...................................................... 44

INTM0: Interrupt Mask Register 0 ................................................................................. 45

INTM1: Interrupt Mask Register 1 ................................................................................. 46

INTES: Interrupt Trigger Edges Select Register ........................................................... 47

STAT0: Line Status Register 0 (real time status monitor)............................................. 48

STAT1: Line Status Register 1 (real time status monitor)............................................. 50

INTS0: Interrupt Status Register 0 ................................................................................ 51

INTS1: Interrupt Status Register 1 ................................................................................ 52

CNT0: Error Counter L-byte Register 0......................................................................... 52

CNT1: Error Counter H-byte Register 1 ........................................................................ 52

TERM: Transmit and Receive Termination Configuration Register .............................. 53

Instruction Register Description .................................................................................... 55

Device Identification Register Description..................................................................... 55

TAP Controller State Description .................................................................................. 56

Absolute Maximum Rating ............................................................................................ 58

Recommended Operation Conditions ........................................................................... 58

Power Consumption...................................................................................................... 59

DC Characteristics ........................................................................................................ 59

E1 Receiver Electrical Characteristics .......................................................................... 60

T1/J1 Receiver Electrical Characteristics...................................................................... 61

E1 Transmitter Electrical Characteristics ...................................................................... 62

T1/J1 Transmitter Electrical Characteristics.................................................................. 63

Transmitter and Receiver Timing Characteristics ......................................................... 64

Jitter Tolerance ............................................................................................................. 65

Jitter Attenuator Characteristics .................................................................................... 67

JTAG Timing Characteristics ........................................................................................ 69

Serial Interface Timing Characteristics ......................................................................... 70

Non_multiplexed Motorola Read Timing Characteristics .............................................. 71

Non_multiplexed Motorola Write Timing Characteristics .............................................. 72

Non_multiplexed Intel Read Timing Characteristics ..................................................... 73

Non_multiplexed Intel Write Timing Characteristics...................................................... 74

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