ISL8022 查看數據表（PDF） - Intersil
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ISL8022 Datasheet PDF : 18 Pages
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ISL8022
Electrical Specifications
Unless otherwise noted, all parameter limits are established over the recommended
operating conditions: TA = -40°C to +85°C, VIN = 2.8V to 5.5V, EN1 = EN2 = VIN,
SYNC = 0V, L = 1.2µH, C1 = 2 x 10µF, C2 = C4 = 22µF, IOUT1 = 0A to 2A, IOUT2 = 0A to
1.7A. (Typical values are at TA = +25°C, VIN = 3.6V). Boldface limits apply over the
operating temperature range, -40°C to +85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 6) TYP (Note 6) UNITS
Peak SKIP Limit
Negative Current Limit
LX1, LX2
Iskip1
Iskip2
Ivalley1
Ivalley2
520 610 730
mA
520 610 730
mA
-2.2 -1.6
-1
A
-2.2 -1.6
-1
A
P-Channel MOSFET ON-Resistance
N-Channel MOSFET ON-Resistance
LX_ Maximum Duty Cycle
VIN = 5.5V, IO = 200mA Channel 1
VIN = 5.5V, IO = 200mA Channel 2
VIN = 5.5V, IO = 200mA Channel 1
VIN = 5.5V, IO = 200mA Channel 2
90
115
mΩ
100 125
mΩ
80
103
mΩ
90
112
mΩ
100
%
PWM Switching Frequency
Synchronization Range
FS
(Note 8)
1.8 2.25 2.7
5.4
8
MHz
MHz
Channel 1 to Channel 2 Phase Shift
Rising edge to rising edge timing
180
°
LX Minimum On Time
SYNC = High (forced PWM mode)
65
ns
Soft Discharge Resistance
PG
RDIS_ EN = LOW
80
100 130
Ω
Output Low Voltage
Sinking 1mA, VFB = 0.5V
0.4
V
PG Pin Leakage Current
PG Pull-up Resistor
PG = VIN = 3.6V
0.01 0.1
µA
1
MΩ
Internal PGOOD Low Rising Threshold
Percentage of nominal regulation voltage
85
91
97
%
Internal PGOOD Low Falling Threshold
Percentage of nominal regulation voltage
78
85
92
%
Delay Time (Rising Edge)
1
ms
Internal PGOOD Delay Time
(Falling Edge)
1
4
µs
EN1, EN2, SYNC
Logic Input Low
0.4
V
Logic Input High
1.4
V
SYNC Logic Input Leakage Current
Enable Logic Input Leakage Current
Thermal Shutdown
ISYNC
IEN_
Pulled up to 5.5V
0.1
1
µA
0.1
1
µA
150
°C
Thermal Shutdown Hysteresis
25
°C
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established
by characterization and are not production tested.
7. The operational frequency per switching channel will be half of the SYNC frequency.
8. Limits established by characterization and are not production tested.
6
FN7650.1
August 25, 2010
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