K4S561632C 查看數據表（PDF） - Samsung

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K4S561632C

256Mbit SDRAM 4M x 16bit x 4 Banks Synchronous DRAM LVTTL

Samsung 

K4S561632C

CMOS SDRAM

Revision History

Revision 0.1 (Feb. 15, 2001)

• Added DC charcteristics.

Revision 0.2 (Mar. 06, 2001)

• Deleted "Preliminary"

• Changed DC charcteristics

Revision 0.3 (Jun 04, 2001)

• Corrected typo in DC characteristics

Revision 0.4 (Sep. 06, 2001)

• Redefined IDD1 & IDD4 in DC Characteristics

• Changed the Notes in Operating AC Parameter.

< Before >

5. For 1H/1L, tRDL=1CLK and tDAL=1CLK+tRP is also supported .

SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP.

< After >

5.In 100MHz and below 100MHz operating conditions, tRDL=1CLK and tDAL=1CLK + 20ns is also supported.

SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + tRP.

Rev. 0.4 Sept. 2001

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