K6R1004C1D 查看數據表（PDF） - Samsung

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K6R1004C1D

256K x 4 Bit (with OE) High-Speed CMOS Static RAM

Samsung 

K6R1004C1D

PRELIMINARY

PRELPIrMeliImNAinRarYy

CMOS SRAM

AC CHARACTERISTICS(TA=0 to 70°C, VCC=5.0V±10%, unless otherwise noted.)

TEST CONDITIONS

Parameter

Value

Input Pulse Levels

0V to 3V

Input Rise and Fall Times

3ns

Input and Output timing Reference Levels

1.5V

Output Loads

See below

Output Loads(A)

DOUT

ZO = 50Ω

RL = 50Ω

VL = 1.5V

30pF*

Output Loads(B)

for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ

DOUT

255Ω

+5.0V

480Ω

5pF*

* Capacitive Load consists of all components of the

test environment.

READ CYCLE*

Parameter

Symbol

Read Cycle Time

tRC

Address Access Time

tAA

Chip Select to Output

tCO

Output Enable to Valid Output

tOE

UB, LB Access Time

tBA

Chip Enable to Low-Z Output

tLZ

Output Enable to Low-Z Output

tOLZ

UB, LB Enable to Low-Z Output

tBLZ

Chip Disable to High-Z Output

tHZ

Output Disable to High-Z Output

tOHZ

UB, LB Disable to High-Z Output

tBHZ

Output Hold from Address Change

tOH

Chip Selection to Power Up Time

tPU

Chip Selection to Power DownTime tPD

K6R1004C1D-10

Min

Max

10

-

-

10

-

10

-

5

-

5

3

-

0

-

0

-

0

5

0

5

0

5

3

-

0

-

-

10

* The above parameters are also guaranteed at industrial temperature range.

* Including Scope and Jig Capacitance

K6R1004C1D-12

Min

Max

12

-

-

12

-

12

-

6

-

6

3

-

0

-

0

-

0

6

0

6

0

6

3

-

0

-

-

12

Unit

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

-5-

Revision 0.2

December 2001

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