K6R1004C1D 查看數據表（PDF） - Samsung
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K6R1004C1D Datasheet PDF : 9 Pages
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K6R1004C1D
WRITE CYCLE*
Parameter
Symbol
K6R1004C1D-10
Min
Max
Write Cycle Time
tWC
10
-
Chip Select to End of Write
tCW
7
-
Address Set-up Time
tAS
0
-
Address Valid to End of Write
tAW
7
-
Write Pulse Width(OE High)
tWP
7
-
Write Pulse Width(OE Low)
tWP1
10
-
UB, LB Valid to End of Write
tBW
7
-
Write Recovery Time
tWR
0
-
Write to Output High-Z
tWHZ
0
5
Data to Write Time Overlap
tDW
5
-
Data Hold from Write Time
tDH
0
-
End of Write to Output Low-Z
tOW
3
-
* The above parameters are also guaranteed at industrial temperature range.
PRELIMINARY
PRELPIrMeliImNAinRarYy
CMOS SRAM
K6R1004C1D-12
Min
Max
12
-
8
-
0
-
8
-
8
-
12
-
8
-
0
-
0
6
6
-
0
-
3
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)
Address
Data Out
tRC
tAA
tOH
Previous Valid Data
Valid Data
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
Address
CS
UB, LB
OE
Data out
VCC
Current
High-Z
ICC
ISB
tRC
tAA
tCO
tBA
tBLZ(4,5)
tOE
tOLZ
tLZ(4,5)
tPU
50%
-6-
tHZ(3,4,5)
tBHZ(3,4,5)
tOHZ
Valid Data
tPD
50%
Revision 0.2
December 2001
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