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LC863416C 查看數據表(PDF) - SANYO -> Panasonic

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LC863416C Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
LC863448C/40C/32C/28C/24C/20C/16C
Analog Mode RGB Characteristics at Ta = -10°C to +70°C, VSS = 0V
Parameter
Symbol
Pins
Conditions
VDD[V]
Ratings
min.
typ.
max.
unit
Analog output
R.G.B
Low level output
0.45
0.5
0.55
voltage
Analog
output
mode
Intensity output
Hi level output
0.90
1.0
1.10
V
5.0
1.35
1.5
1.65
Time setting
R.G.B
70%
10pf load
50
ns
Sample Current Dissipation Characteristics at Ta = -10°C to +70°C, VSS = 0V
The sample current dissipation characteristics is the measurement result of Sanyo provided evaluation board when the
recommended circuit parameters shown in the sample oscillation circuit characteristics are used externally.
The currents through the output transistors and the pull-up MOS transistors are ignored.
Parameter
Current dissipation
during basic
operation
(Note 3)
Symbol
IDDOP(1)
Pins
VDD
Conditions
FmX’tal=32.768kHz
X’tal oscillation
System clock : VCO
VCO for OSD operating
OSD is Digital mode
Internal RC oscillation stops
VDD[V]
Ratings
unit
min
typ
max
4.5 to 5.5
11
25
mA
IDDOP(2)
VDD
FmX’tal=32.768kHz X’tal scillation
System clock: VCO
VCO for OSD operating
OSD is Analog mode
Internal RC oscillation stops
4.5 to 5.5
20
35
IDDOP(3)
VDD
Current dissipation
in HALT mode
(Note 3)
IDDHALT(1)
VDD
FmX’tal=32.768kHz X’tal scillation
System clock : X’tal
(Instruction cycle time: 366.2µs)
VCO for system VCO for OSD,
internal RC oscillation stop
Data slicer, AD converters stop
HALT mode
FmX’tal=32.768kHz
X’tal oscillation
System clock : VCO
VCO for OSD stops
Internal RC oscillation stops
4.5 to 5.5
4.5 to 5.5
65
300 μA
3
9 mA
IDDHALT(2)
VDD
IDDHALT(3)
VDD
HALT mode
FmX’tal=32.768kHz
X’tal oscillation
VCO for system stops
VCO for OSD stops
System clock : Internal RC
HALT mode
FmX’tal=32.768kHz
X’tal oscillation
VCO for system stops
VCO for OSD stops
System clock: X’tal
(Instruction cycle time: 366.2μs)
4.5 to 5.5
4.5 to 5.5
300 1000
μA
57
200
Current dissipation
in HOLD mode
IDDHOLD
VDD
HOLD mode
All oscillation stops.
4.5 to 5.5
0.05
(Note 3)
Note 3: The currents through the output transistors and the pull-up MOS transistors are ignored.
20 μA
No.A0117-13/18

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