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1840 查看數據表(PDF) - Linear Technology

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1840 Datasheet PDF : 12 Pages
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LTC1840
U
OPERATIO
GPIO Operation
The GPIO circuits feature N-channel MOSFET open drain
pull-downs that can drive LEDs and readback circuitry to
allow the logic states of the GPIO pins to be accessed
through the serial interface. The circuits that read the logic
states of the pins have standard CMOS thresholds. The
user must take care to minimize the power dissipation in
the pull-downs. LEDs should have series resistors added
to limit current and to limit the voltage drop across the
internal pull-down if their forward drop is less than about
VCC minus 0.7V. The N-channel MOSFET pull-downs can
sink 10mA at 0.7V drop to drive LEDs. A series resistor is
usually required to limit LED current and the LTC1840
internal power dissipation. See Table 3 for resistor values.
Table 3. Recommended LED Resistor Values
LED Current (mA)
Recommended
Series Resistor ()
VCC = 3V
VCC = 5V
1
1k
3k
3
270
910
5
120
510
10
30
240
Note: LED forward voltage drop assumed to be 2V.
FAULT Operation
Normally, the FAULT pin internal pull-down is only en-
abled if one of the fault bits in the fault register is high. But
it is also enabled if the part is shut down by the POR block
due to low VCC supply. This POR fault does not have a
corresponding fault register bit.
BLAST and Serial Interface Watchdog Timer
Operation
The BLAST pin is used to force the DAC output currents to
full value instantaneously and also to gate the operation of
the serial interface watchdog timer. A blast will occur if the
BLAST pin is high when the part comes out of POR or if
there is a high to low transition on BLAST after POR. The
threshold of the BLAST pin is about 1V, independent of
VCC. The serial interface watchdog timer, which will signal
a fault condition if the part has not been addressed via the
serial interface for about a minute and a half, is only active
if the BLAST pin is high. If neither blasts nor an active serial
interface watchdog timer are desired, this pin should be
tied to ground. If timer operation is desired without having
a blast occur at power-up, the pin should be pulled above
1V after the part’s supply has ramped up. The blast state
is cleared by writing to the fault register.
Current Output DAC Interface to Switching Regulator
The output of a current DAC is used to control the output
voltage of a switching regulator that powers a fan, which
determines the rotational speed of the fan. The resistor
divider from the output of the regulator to the feedback pin
to ground should be ratioed to give the minimum desired
voltage from the fan, which corresponds to the minimum
fan speed. The size of the resistor from the output to the
feedback pin is then chosen by dividing the difference
between the maximum and minimum desired fan voltages
by the nominal maximum current output of the DAC, which
is 100µA. The value of the resistor from the feedback pin
to ground is then derived from the divider ratio and the
resistor value just calculated.
For example, if the feedback pin of the regulator is at 1.25V
with respect to ground and the minimum desired fan
voltage is 5V, the top resistor in the divider should be
(5V – 1.25V)/1.25V = 3 times larger than the resistor from
the feedback node to ground. If the maximum desired fan
voltage is 12V, the top resistor value is then (12V – 5V)/
100µA = 69.8k, and the bottom resistor is 69.8k/3 = 23.2k.
See Figure 1.
If the feedback pin voltage of a regulator is lower than the
1.1V compliance voltage of either of the LTC1840’s cur-
rent output DACs, the resistor from the regulator output to
the feedback pin can be divided into two resistors, giving
the DAC more room to operate. See Figure 2.
If more than one fan is controlled by one regulator output,
small differences in the actual rotational speeds of the fans
may result in audible beat frequencies, which can be very
annoying. To avoid this problem, the actual voltages
applied to the fans can be varied by adding resistors or
diodes in series with some of the fans, resulting in larger
differences between their rotational speeds and less
noticeable beating. See Figure 3.
1840f
10

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