LTC3732 查看數據表（PDF） - Linear Technology

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LTC3732

3-Phase, 5-Bit VID, 600kHz, Synchronous Buck Switching Regulator Controller

Linear Technology 

W

FU CTIO AL DIAGRA

PLLIN

FIN

50k

RLP PLLFLTR

CLP

PHASE DET

OSCILLATOR

CLK1

CLK2

CLK3

LTC3732

FCB

+

0.6V –

FCB

PGOOD

100µs

DELAY

PROTECTION

IN–

40k

40k

–

A1

IN+

+

0.66V

EAIN

0.54V

RS

LATCH

DUPLICATE FOR SECOND AND THIRD

CONTROLLER CHANNELS

BOOST

DROP

OUT

DET

BOT

TG

TOP

SQ

FORCE BOT

RQ

SWITCH

SW

LOGIC

0.55V

+B

–

FCB

SHDN

VCC/DRVCC*

BG

BOT

PGND

VCC

VIN

DB

CB

DIFFOUT

40k

40k

R1

20k

VFB

–

EAIN 0.600V

EA

+

0.660V

ITH

+

OV

–

CC

R2 VARIABLE

RC

5-BIT VID DECODER

VID0 VID1 VID2 VID3 VID4

I1 –

SLOPE

COMP

5(VFB)

SS

CLAMP

–

+

I2

+

3mV

54k

54k

2.4V

L

VCC

36k SENSE+

36k SENSE–

RSENSE

COUT

VOUT

VCC

1.5µA

6V

FCB

SHDN

RST

5(VFB)

SHED

RUN

SOFT-

START

0.600V

VREF

INTERNAL

SUPPLY

UV/ OVERTEMP

RESET

VCC

SGND

RUN/SS

VCC

+

CCC

CSS

+

CIN

Figure 2

3732 F02

* UHF PACKAGE CONNECTION

U

OPERATIO (Refer to Functional Diagram)

Main Control Loop

The IC uses a constant frequency, current mode step-

down architecture. During normal operation, each top

MOSFET is turned on each cycle when the oscillator sets

the RS latch, and turned off when the main current

comparator, I1, resets each RS latch. The peak inductor

current at which I1 resets the RS latch is controlled by the

voltage on the ITH pin, which is the output of the error

amplifier EA. The EAIN pin receives a portion of this

voltage feedback signal via the DIFFOUT pin through the

internal VID DAC and is compared to the internal reference

3732f

9

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