LC75742W 查看數據表（PDF） - SANYO -> Panasonic

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LC75742W

1/2 Duty VFD Driver with Key Input Function

SANYO -> Panasonic 

Block Diagram

LC75742E, LC75742W

Pin Descriptions

Pin No.

Pin

Function

I/O

3

VFL

Driver block power supply. Applications must provide a voltage in the range 8.0 to 18.0 V.

—

59

VDD

Logic block power supply. Applications must provide a voltage in the range 4.5 to 5.5 V.

—

56

VSS

Power supply ground. This pin must be connected to the system ground.

—

58

OSCI Oscillator circuit connections. An oscillator circuit is formed by connecting a resistor and a

I

57

OSCO capacitor externally to these pins.

O

Reset signal input used to initialize the IC internal state. During a reset,

60

BLK

the display is turned off forcibly regardless of the internal display data.

I

Also note that the internal key data is all reset to 0 and key scan operations are disabled.

However, serial data input is possible in this state.

63

CL

Serial data interface. These pins must be connected to the system microcontroller.

64

DI

Note that since DO is an open-drain output, a pull-up resistor is required.

I

62

CE

CL: Synchronization clock DI: Transfer data

61

DO

CE: Chip enable

DO: Output data

O

1, 2

G1, G2 Digit outputs. The frame frequency fO is (fOSC/4096) Hz.

O

44 to 4 S1 to S41 Segment outputs that display the display data transferred over the serial interface.

O

Key scan outputs. Normally, when a key matrix is formed, diodes are inserted in the key

45 to 50 KS1 to KS6 scan timing lines to prevent shorts. However, since this IC uses unbalanced CMOS outputs O

in the output transistor circuit, the IC will not be damaged if these outputs are shorted.

51 to 55 KI1 to KI5 Key scan inputs. Pull-down resistors are built into the IC internal pin circuits.

I

Handling when unused

—

—

—

GND

OPEN

GND

GND

OPEN

OPEN

OPEN

OPEN

GND

No. 6142-5/18

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