SDRAM (Rev.1.2)
Apr. '99
64M bit Synchronous DRAM
MITSUBISHI LSIs
M2V64S20BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 4194304-WORD x 4-BIT)
M2V64S30BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 2097152-WORD x 8-BIT)
M2V64S40BTP-7,-7L,-8,-8L,-8A,-10,-10L (4-BANK x 1048576-WORD x 16-BIT)
SIMPLIFIED STATE DIAGRAM
SELF
REFRESH
REFS
REFSX
MODE
REGISTER
SET
MRS
IDLE
REFA
AUTO
REFRESH
CLK
SUSPEND
CKEL
CKEH
ACT
CKEL
POWER
DOWN
CKEH
TBST (for Full Page)
ROW
ACTIVE
TBST (for Full Page)
WRITE
READ
CKEL
WRITE
WRITE
SUSPEND
CKEH
WRITEA READA
READ
WRITE
READ
CKEL READ
SUSPEND
CKEH
WRITEA
CKEL
WRITEA
WRITEA
SUSPEND
CKEH
WRITEA
READA
PRE
PRE
PRE
READA
CKEL READA
READA
SUSPEND
CKEH
POWER
APPLIED
POWER
PRE
ON
PRE
CHARGE
MITSUBISHI ELECTRIC
12
Automatic Sequence
Command Sequence