MP7651
8-Channel, Voltage Output
10 MHz Input Bandwidth 8-Bit Multiplying
DACs with Serial Digital Data Port
and Chip Select Decoder
FEATURES
• 8 Independent 2-Quadrant Multiplying 8-Bit DACs
• Serial Digital Input Data and Address Port (3-Wire
Standard) plus Internal Chip Address Decoder©
• Dual Supplies (+5 V typ.)
• High Speed:
– 12.5 MHz Digital Clock Rate
– VREF to VOUT Settling Time: 150ns to
8-bit (typ)
– Voltage Reference Input Bandwidth:
10 MHz (typ)
• Low Power: 150mW (typ)
• Low AC Voltage Reference Feedthrough
• Excellent Channel-to-Channel Isolation
• DNL = +0.8 LSB, INL = +1 LSB (typ)
• DACs Matched to +0.5% (typ)
• Low Harmonic Distortion: 0.25% typical
with VREF = 1 V p-p @ 1 MHz
• VREF/2 Output Preset Level
• Latch-Up Proof
• Greater than 2000 V ESD Protection
APPLICATIONS
• ATE
• Process Control (Low Noise)
• Convergence Adjustment for High
Resolution Monitors (Work Stations)
• Digital Gain/Attenuation/Offset Control
• Trimmer Replacement
GENERAL DESCRIPTION
The MP7651 is ideal for direct gain control of video, compos-
ite video, CCD and other high frequency analog signals. The de-
vice includes 8-channels of high speed, high bandwidth, two
quadrant, multiplying, 8-bit accurate digital-to-analog converter.
It includes an output drive buffer per channel capable of driving
+1mA (typ) to a load. DNL of better than +0.8 LSB is achieved
with a channel-to-channel matching of better than 0.5%. Stabil-
ity, matching, and precision of the DACs is achieved by using
EXAR’s thin film technology. Also, excellent channel-to-channel
isolation is achieved with EXAR’s BiCMOS process which can-
not be achieved using a typical CMOS technology.
An open loop architecture (patent pending) provides wide
small signal bandwidth from VREF to output up to 10 MHz (typ),
fast output settling time, and VREF feedthrough isolation of
–65dB or better. In addition, low distortion in the order of 0.25%
with a 1 V p–p, 1 MHz signal.
A specified and constant input impedance of each VREF+ in-
put gives flexibility for optimal system design. The serial data
3-wire standard µ-processor logic interface reduces pin count,
package size (28 pin), and board wire (space). Additionally, the
internal chip select decoder allows for easy daisy chaining with-
out the addition of separate control logic.
MP7651 is fabricated on a junction isolated, high speed, dual
metal, linear compatible BiCMOS (BiCMOS IVTM) thin film resis-
tors. This process enables precision high speed analog/digital
(mixed-mode) circuits to be fabricated on the same chip.
Rev. 2.00
1