MP8798 查看數據表（PDF） - Exar Corporation

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MP8798

CMOS Very Low Power, 1 MSPS 10-Bit Analog-to-Digital Converter with 4-Channel Mux

Exar Corporation 

MP8798

Analog Input Multiplexer

The MP8798 includes a 4-channel analog input multiplexer.

The relationship between the clock, the multiplexer address, the

WR and the output data is shown in Figure 10.

Clock

Sample N

Old Address

Sample M

New Address

Sample

M+1

tCLKS2 tWR tCLKH2

WR

tAS

tAH

ÉÉÉÉ Address ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ

DB0-DB9 N-2 Valid

N-1 Valid

Old Address

tCLKS2 = tCLKH2 = 0

N Valid

Old Address

M Valid

New Address

Figure 10. MUX Address Timing

Digital Interfaces

The logic encodes the outputs of the comparators into a bi-

nary code and latches the data in a D-type flip-flop for output.

The functional equivalent of the MP8798 (Figure 12.) is com-

posed of:

1) Delay stage (tAP) from the clock to the sampling phase

(φS).

2) An ideal analog switch which samples VIN.

3) An ideal A/D which tracks and converts VIN with no

delay.

4) A series of two DFF’s with specified hold (tHLD) and

delay (tDL) times.

tAP, tHLD and tDL are specified in the Electrical Characteristics

table.

A1, A0

WR

MUXEN

(Internal Signal)

tAS

tAH

tWR

tMUXEN1

Figure 11. Analog MUX Timing

Reference Voltages

The input/output relationship is a function of VREF:

AIN = VIN – VREF(–)

VREF = VREF(+) – VREF(–)

DATA = 1023 ∗ (AIN/VREF)

A system can increase total gain by reducing VREF.

φS

VIN

A/D

DQ

DQ

DB9-DB0

tAP

MP8798

CLK

N

VIN

tDL

DB9-DB0

N+1

tHLD

N-1

CLK

N

Figure 12. MP8798 Functional Equivalent

Circuit and Interface Timing

Rev. 3.00

9

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