¡ Semiconductor
MSM7580
DECODER
SYNCA
SIA
BCLKA
THR
ADPCM side SYNC (SYNCA)
ADPCM Input (SIA)
Serial 8
Parallel
Latch
Through-data
8b
ADPCM
DECODER
Latch timing=A
MSB
LSB
Internal Latch timing (A)
Internal Input Data
PCM side SYNC (SYNCP)
Throgh-data output (SOP)
BCLKP
THR
S
E
L
8b
Parallel
Serial
SYNCP
SOP
BCLKP
Through-data
This data is output here.
MSB
Less than are BCLKP cycle
from the rising edge of SYNCA signal.
100ns or more
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