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MSM7630 查看數據表(PDF) - Oki Electric Industry

零件编号
产品描述 (功能)
比赛名单
MSM7630
OKI
Oki Electric Industry OKI
MSM7630 Datasheet PDF : 95 Pages
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¡ Semiconductor
MSM7630
PIN DESCRIPTIONS
Symbol
D31-16
A23-0
ROM
SRAM
RD
WR0,1
RAS
CAS0,1
WE
AS
TXD
RXD
DTR
DSR
RTS
CTS
SCLK
PD7-0
PACK
PSTB
PCS
PIOA
POBF
PIBF
UPORT
TEST0
DAO1
SG
CLK
XO
CLKA
RST
STBY
EXTINT
TSTM2,1
Type
I/O
O
O
O
O
O
O
O
O
O
O
I
O
I
O
I
O
I/O
I
I
I
I
3-state
3-state
O
I
O
I
I
O
O
I
I
I
I
Description
16-bit data bus. 8-bit devices are accessed through D31-24.
24-bit address bus. DRAM addresses are output from A13-0.
ROM select signal. ROM indicates that ROM space is assigned to the specified address.
It is used as a chip select signal.
SRAM select signal. SRAM indicates that SRAM space is assigned to the specified address.
It is used as a chip select signal.
Read signal. RD is active during both 8-bit and 16-bit reads.
Write signals. WR0 corresponds to writes from D31-24, and WR1 corresponds to
writes from D23-16.
Row address strobe. RAS is active during both 8-bit and 16-bit reads.
Column address strobe. CAS0 corresponds to accesses from D31-24, and CAS1
corresponds to accesses from D23-16.
Write enable. WE is active during writes to DRAM space as the DRAM write signal.
Address strobe.
Serial data output.
Serial data input.
Control signal indicating SIO can transmit and receive.
Input signal indicating that modem is in operable state.
SIO transmit request signal.
Input signal indicating that modem can transmit.
Synchronous transfer clock output.
Parallel port data input/output.
Parallel port read signal. Set high for Centronics interface.
Parallel port write signal. Strobe signal for Centronics interface.
Parallel port chip select signal.
Parallel port address signal. Selects data or status during an access.
Output port buffer full. Indicates that data has been set in the output buffer.
Input port buffer full. Indicates that there is data in the input buffer.
Busy output signal for Centronics interface.
General flag output signal.
Connects with SG.
D/A converter output.
Signal ground. Connects with TEST0.
Clock input signal.
Clock signal. Inverse of CLK.
Internal clock signal.
Reset input.
Standby signal. STBY suspends operation and places the MSM7630 in a standby state.
External interrupt signal.
Test mode select input signal.
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