PA5750 查看數據表（PDF） - ProTek Devices.
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PA5750 Datasheet PDF : 30 Pages
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ANALOG PRODUCTS DIVISION
3. TYPICAL APPLICATION CIRCUIT
PA5750
Low Power Stereo Audio CODEC
With Speaker and Headphone Amplifier.
DVDD
PVDD
AUDIO INTERFACE
I2S, DSP
PVDD
SPI, I2C
CONTROL INTERFACE
2
3
DVDD
PVDD
10µF 0.1µF 10µF 0.1µF
4 DGND
PA5750
18
AVDD 17
HPVDD
AVDD
HPVDD
AGND 19
HPGND 14
0.1µF 10µF 0.1µF 10µF
10K
10K
LIN3
RIN3
LIN2
RIN2
LIN1
RIN1
1 MCLK
5 SCLK
6 DSDIN
7
8
DLRCK
ASDOUT
9 ALRCK
30 CE
32 CCLK
31 CDATA
24 LIN3
23 RINPUT3/HPDET
MONOOUT 10
OUT3 11
LOUT1 13
ROUT1 12
15
ROUT2
LOUT2 16
26
LIN2
25 RIN2
28 LIN1
27 RIN1
MICBIAS 22
VMID 21
20
ADCREF
DACREF 29
GND_THERMAL 33
*If connected to Headphone use 220µF Capacitor
If connected to Line out use a1 ot 10µF capacitor
1µF
220µF*
220µF
220µF
10µF 0.1µF
10µF 0.1µF
10µF 0.1µF
10µF 0.1µF
4. CLOCK MODES AND SAMPLING FREQUENCIES.
According to the input serial audio DATA sampling frequency, the PA5750 can work in two speed modes. Single
or double speed. The range of the sampling frequency in these two modes is listed in Table 1. The PA5750 can
work in either master clock mode or in slave clock mode.
In slave mode, LRCK and SCLK are supplied externally. LRCK and SCLK must be synchronously derived from
the system clock with a specific rate, The PA5750 can auto detect MCLK/LRCK ratio according to Table 1. The
PA5750 only supports the MCLK/LRCK ratios listed in Table 1. The LRCK/SCLK ratio is normally 64.
Table 1 Slave Mode Sampling Frequencies and MCLK/SCLK Ratio.
Speed Mode
Single Speed
Double Speed
Sampling Frequency
8 kHz – 50 kHz
50 kHz – 100 kHz
MCLK/LRCK Ratio
256, 384, 512, 768, 1024.
128, 192, 256, 384, 512.
In master mode, LRCK and SCLK are internally derived from MCLK.
The available MCLK/LRCK ratios are listed in Table 2.
561 E Elliot Road.#175 Chandler, AZ 85225 Tel: (480)539-2900. Fax: (480)632-1715.
5
95230 Rev.0. 04/09
www.protekanalog.com
Not for use in any life support systems.
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