PCF8833 查看數據表（PDF） - Philips Electronics

零件编号

产品描述 (功能)

比赛名单

PCF8833

STN RGB - 132×132×3 driver

Philips Electronics 

Philips Semiconductors

STN RGB - 132 × 132 × 3 driver

Objective specification

PCF8833

SYMBOL

OSC

VDD(tieoff)

VOTP(drain)

VOTP(gate)

T6

T5

T4

T3

T2

T1

VSS(tieoff)

VSS(tieoff)

T7

C1+

C1−

C2+

C2−

C3+

C3−

C4+

C4−

VLCDOUT1

VLCDIN1

C5+

C5−

VLCDOUT2

VLCDSENSE

VLCDIN2

V2L

V1L

VC

V1H

PAD

555

556

557 to 564

565 to 572

573

574

575

576

577

578

579

624

625

626 to 631

632 to 637

638 to 643

644 to 649

650 to 655

656 to 661

662 to 667

668 to 673

674 to 683

684 to 690

691 to 696

697 to 702

703 to 711

712

713 to 719

720, 721

722, 723

724 to 728

729, 730

TYPE

DESCRIPTION

I oscillator input or external oscillator resistor connection; when the on-chip

oscillator is used this input must be connected to VDD1; an external clock signal,

if used, is connected to this input and the internal oscillator must be switched off

with a software command; if the oscillator and external clock are all inhibited by

connecting pin OSC to VSS1, the display is not clocked and may be left in a

DC state; to avoid this the chip should always be put into Power-down mode

before stopping the clock.

O can be used to tie inputs to VDD1

PS supply voltage for OTP programming (write voltage), in Application mode must

be tied to VSS1 or left open-circuit

PS supply voltage for OTP programming, in Application mode must be tied to VSS1

or left open-circuit

I test pin; not accessible to user; must be connected to VSS1

I test pin; not accessible to user; must be connected to VSS1

O test pin; not accessible to user; must be left open-circuit

O test pin; not accessible to user; must be left open-circuit

I/O test pin; not accessible to user; must be also connected to VSS1

I/O test pin; not accessible to user; must be also connected to VSS1

O can be used to tie inputs to VSS1

O can be used to tie inputs to VSS1

I/O test pin; not accessible to user; must be connected to VSS1

I positive input pump capacitor voltage multiplier 1

I negative input pump capacitor voltage multiplier 1

I positive input pump capacitor voltage multiplier 1

I negative input pump capacitor voltage multiplier 1

I positive input pump capacitor voltage multiplier 1

I negative input pump capacitor voltage multiplier 1

I positive input pump capacitor voltage multiplier 1

I negative input pump capacitor voltage multiplier 1

O output voltage multiplier 1

PS LCD supply input voltage 1

I positive input pump capacitor voltage multiplier 2

I negative input pump capacitor voltage multiplier 2

O output voltage multiplier 2

I voltage multiplier regulation input; must be connected to VLCDOUT2

PS LCD supply input voltage 2

O LCD bias level

O LCD bias level

O LCD bias level

O LCD bias level

2003 Feb 14

6

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