74ABT899 查看數據表（PDF） - Philips Electronics

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74ABT899

9-bit dual latch transceiver with 8-bit parity generator/checker (3-State)

Philips Electronics 

Philips Semiconductors

9-bit dual latch transceiver with 8-bit parity

generator/checker (3-State)

Product specification

74ABT899

9–bit

Transparent

Latch

OE

9–bit

Output

Buffer

27 OEB

LEA 3

A0 4

A1 5

A2 6

A3 7

A4 8

A5 9

A6 10

A7 11

APAR 12

OEA 13

SEL 16

ODD/ 1

EVEN

LE

1

Parity

mux

Generator

0

9–bit

Output

Buffer

OE

1

mux

Parity

0

Generator

9–bit

Transparent

Latch

LE

26 B0

25 B1

24 B2

23 B3

22 B4

21 B5

20 B6

19 B7

18 BPAR

17 LEB

2 ERRA

15 ERRB

SA00292

FUNCTION TABLE

INPUTS

OEB OEA SEL LEA

H

H

X

X

H

L

L

L

H

L

L

H

H

L

L

X

H

L

H

X

H

L

H

H

L

H

L

H

L

H

L

H

L

H

L

L

L

H

H

H

L

H

H

H

L

L

X

X

H = High voltage level

L = Low voltage level

X = Don’t care

LEB

X

H

H

L

H

H

X

H

X

L

H

X

OPERATING MODE

3-State A bus and B bus (input A & B simultaneously)

B → A, transparent B latch, generate parity from B0 - B7, check B bus parity

B → A, transparent A & B latch, generate parity from B0 - B7, check A & B bus parity

B → A, B bus latched, generate parity from latched B0 - B7 data, check B bus parity

B → A, transparent B latch, parity feed-through, check B bus parity

B → A, transparent A & B latch, parity feed-through, check A & B bus parity

A → B, transparent A latch, generate parity from A0 - A7, check A bus parity

A → B, transparent A & B latch, generate parity from A0 - A7, check A & B bus parity

A → B, A bus latched, generate parity from latched A0 - A7 data, check A bus parity

A → B, transparent A latch, parity feed-through, check A bus parity

A → B, transparent A & B latch, parity feed-through, check A & B bus parity

Output to A bus and B bus (NOT ALLOWED)

1998 Jan 16

4

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