Philips Semiconductors
YUV-to-RGB Digital-to-Analog
Converter (DAC)
Preliminary specification
SAA7167
Table 8 Bit functions in data byte; notes 1 and 2
BIT
FMTC1 and FMTC0
KINV
KEN
DRP
KMOD2 to KMOD0
KDLY2 to KDLY0
KD7 to KD0
DESCRIPTION
video format control:
00; YUV 4 : 2 : 2
01; YUV 4 : 1 : 1
10; YUV 2:1:1/CCIR 656
11; RGB 5 : 6 : 5
key polarity:
KINV = 0: EXTKEY = HIGH for analog mixer to select DAC outputs
KINV = 1: EXTKEY = HIGH for analog mixer to select analog RGB inputs
key enable:
0 = disable
1 = enable
UV input data code: 0 = two’s complement; 1 = binary offset
keying mode:
000; external key
100; 8-bit pixel colour key
101; 2 × 8-bit pixel colour key (with two-edge clock latching for pixel input)
110; 2 × 8-bit pixel colour key (with one-edge clock latching for pixel input)
111; 3 × 8-bit pixel colour key (with one-edge clock latching for pixel input)
all other combinations are reserved
added keying delay cycles (from 0 to 7 PCLK)
the data value compared for 8, 16 or 24-bit pixel colour key
Notes
1. All I2C-bus control bits are initialized to logic 0 after RES is activated.
2. PCLK should be active in any event to allow for correct operation of I2C-bus programming.
DC CHARACTERISTICS
Tamb = 0 to 70 °C.
SYMBOL
PARAMETER
VDDD
VDDA
IDDtot
VIH
VIL
VIH
VIL
Vin
Vout
DNL
INL
digital supply voltage
analog supply voltage
total supply current (fclk = 50 MHz)
HIGH level input voltage (pin SDA)
LOW level input voltage (pin SDA)
HIGH level digital input voltage
LOW level digital input voltage
full-scale analog RGB inputs
full scale analog RGB outputs (for 150 Ω load)
differential non-linearity error of video output
integral non-linearity error of video output
MIN.
4.75
4.75
−
3
−0.5
2
−
−
−
−
−
TYP.
5.0
5.0
100
−
−
−
−
0.7
1.4
−
−
MAX.
5.25
5.25
−
VDDD + 0.5
+1.5
−
0.8
−
−
1
1
UNIT
V
V
mA
V
V
V
V
V
V
LSB
LSB
1995 Nov 03
9