SAKC505A-2R 查看數據表（PDF） - Infineon Technologies

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SAKC505A-2R

8-Bit Single-Chip Microcontroller

Infineon Technologies 

C505/C505C/C505A/C505CA

Memory Organization

The C505 CPU manipulates operands in the following four address spaces:

– On-chip program memory :16K byte ROM (C505(C)(A)-2R) or

32K byte ROM (C505A-4R/C505CA-4R) or

32K byte OTP (C505A-4E/C505CA-4E)

– Totally up to 64K byte internal/external program memory

– up to 64 Kbyte of external data memory

– 256 bytes of internal data memory

– Internal XRAM data memory :256 byte (C505/C505C)

1K byte (C505A/C505CA)

– a 128 byte special function register area

Figure 5 illustrates the memory address spaces of the C505 versions.

FFFF H

Ext.

Int.

(EA = 1)

4000 H /

8000 H

3FFF H /

7FFF H

Ext.

(EA = 0)

0000 H

Alternatively

FFFF H

Internal

XRAM

See table below

Ext.

Unused for detailed

Data

Memory

Area

Int. CAN

Data Memory

partitioning

Contr.

(256 Byte)

F700 H

F6FF H Indirect

Direct

Ext.

Data

Memory

Addr.

Addr.

FF H

FF H

Internal

Special

RAM

Function

Regs.

80 H

80 H

7F H

Internal

RAM

0000 H

00 H

"Code Space"

"Data Space"

"Data Space" F700H to FFFFH:

Device CAN Area

Unused Area

XRAM Area

C505

C505C

C505A

C505CA

F700H F7FFH

F700H F7FFH

F700H FEFFH

F800H FEFFH

F700H FBFFH

F800H FBFFH

FF00H FFFFH

FF00H FFFFH

FC00H FFFFH

FC00H FFFFH

"Internal Data Space"

MCB03632

Figure 5

C505 Memory Map Memory Map

Data Sheet

13

12.00

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