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SAKC505A-2R 查看數據表(PDF) - Infineon Technologies

零件编号
产品描述 (功能)
比赛名单
SAKC505A-2R
Infineon
Infineon Technologies Infineon
SAKC505A-2R Datasheet PDF : 88 Pages
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C505/C505C/C505A/C505CA
Table 3
Special Function Registers - Functional Blocks (contd)
Block Symbol Name
Address Contents after
Reset
Ports
P0
P1
P1ANA 2) 4)
P2
P3
P4
Port 0
Port 1
Port 1 Analog Input Selection Register
Port 2
Port 3
Port 4
80H 1)
90H 1)
90H 1)
A0H 1)
B0H 1)
E8H 1)
FFH
FFH
FFH
FFH
FFH
XXXXXX11B
Serial
Channel
ADCON0 2) A/D Converter Control Register 0
PCON 2) Power Control Register
SBUF
Serial Channel Buffer Register
SCON
Serial Channel Control Register
SRELL Serial Channel Reload Register, low byte
SRELH Serial Channel Reload Register, high byte
D8H 1)
87H
99H
98H 1)
AAH
BAH
00X00000B 3)
00H
XXH 3)
00H
D9H
XXXXXX11B 3)
Timer 0/
Timer 1
TCON
TH0
TH1
TL0
TL1
TMOD
Timer 0/1 Control Register
Timer 0, High Byte
Timer 1, High Byte
Timer 0, Low Byte
Timer 1, Low Byte
Timer Mode Register
88H 1)
00H
8CH
00H
8DH
00H
8AH
00H
8BH
00H
89H
00H
Compare/
Capture
Unit /
Timer 2
CCEN
CCH1
CCH2
CCH3
CCL1
CCL2
CCL3
CRCH
CRCL
TH2
TL2
T2CON
IEN0 2)
IEN1 2)
Comp./Capture Enable Reg.
Comp./Capture Reg. 1, High Byte
Comp./Capture Reg. 2, High Byte
Comp./Capture Reg. 3, High Byte
Comp./Capture Reg. 1, Low Byte
Comp./Capture Reg. 2, Low Byte
Comp./Capture Reg. 3, Low Byte
Reload Register High Byte
Reload Register Low Byte
Timer 2, High Byte
Timer 2, Low Byte
Timer 2 Control Register
Interrupt Enable Register 0
Interrupt Enable Register 1
C1H
C3H
C5H
C7H
C2H
C4H
C6H
CBH
CAH
CDH
CCH
C8H 1)
A8H 1)
B8H 1)
00H 3)
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00X00000B 3)
00H
00H
Watchdog
WDTREL
IEN0 2)
IEN1 2)
IP0 2)
Watchdog Timer Reload Register
Interrupt Enable Register 0
Interrupt Enable Register 1
Interrupt Priority Register 0
86H
00H
A8H 1)
00H
B8H 1)
00H
A9H
00H
Pow. Save PCON 2) Power Control Register
Modes PCON1 4) Power Control Register 1
87H
88H 1)
00H
0XX0XXXXB 3)
1) Bit-addressable special function registers
2) This special function register is listed repeatedly since some bits of it also belong to other functional blocks.
3) Xmeans that the value is undefined and the location is reserved
4) SFR is located in the mapped SFR area. For accessing this SFR, bit RMAP in SFR SYSCON must be set.
Data Sheet
20
12.00

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