SAKC505A-2R 查看數據表（PDF） - Infineon Technologies

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SAKC505A-2R

8-Bit Single-Chip Microcontroller

Infineon Technologies 

C505/C505C/C505A/C505CA

I/O Ports

The C505 has four 8-bit I/O ports and one 2-bit I/O port. Port 0 is an open-drain bidirectional I/O

port, while ports 1 to 4 are quasi-bidirectional I/O ports with internal pullup resistors. That means,

when configured as inputs, ports 1 to 4 will be pulled high and will source current when externally

pulled low. Port 0 will float when configured as input.

The output drivers of port 0 and 2 and the input buffers of port 0 are also used for accessing external

memory. In this application, port 0 outputs the low byte of the external memory address, time

multiplexed with the byte being written or read. Port 2 outputs the high byte of the external memory

address when the address is 16 bits wide. Otherwise, the port 2 pins continue emitting the P2 SFR

contents. In this function, port 0 is not an open-drain port, but uses a strong internal pullup FET .

Port 4 is 2-bit I/O port with CAN controller specific alternate functions. The eight analog input lines

are realized as mixed digital/analog inputs. The 8 analog inputs, AN0-AN7, are located at the port

1 pins P1.0 to P1.7. After reset, all analog inputs are disabled and the related pins of port 1 are

configured as digital inputs. The analog function of a specific port 1 pin is enabled by bits in the SFR

P1ANA. Writing a 0 to a bit position of P1ANA assigns the corresponding pin to operate as analog

input.

Note : P1ANA is a mapped SFR and can be only accessed if bit RMAP in SFR SYSCON is set.

Data Sheet

27

12.00

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