SiI 141B
PD
Q[35:0], DE,
TPDL
VSYNC, HSYNC,
CTL[3:1]
Figure 5. Output Signals Disabled Timing from PD Active
RXC
Q[35:0], DE,
VSYNC, HSYNC,
CTL[3:1]
TCLKPD
...
...
Figure 6. Output Signals Disabled Timing from Clock Inactive
RXC
SCDT
... TCLKPU + TFSC
...
Figure 7. Wake-up on Clock Detect
DE
SCDT
DE
SCDT
THSC
TFSC
Figure 8. SCDT Timing from DE Inactive/Active
SiI-DS-0037-C
Silicon Image, Inc.
6
Subject to Change without Notice