SPT7722 查看數據表（PDF） - Fairchild Semiconductor

零件编号

产品描述 (功能)

比赛名单

SPT7722

8-bit, 250 MSPS A/D Converter with Demuxed Outputs

Fairchild Semiconductor 

DATA SHEET

SPT7722

VIN

CLK

CLK

U6-

Reset

Reset

Reset

Bank A

N-2

tap

N-1

550ps

550ps

2.5 CLK Cycles

of Latency

N+1

N+2

INTERLEAVED DATA OUTPUT

N-5

Invalid Data

Bank B

N-6

tpd3

Bank A

N-7

N-4

N-2

6ns typ PARALLEL DATA OUTPUT

N-5

Invalid Data

Bank B

N-6

DCLKOUT

DCLKOUT

N-4

N-2

tpd3

N+3

N+4

tpd1

tpd1

N-1

N+1

N

N-1

N

VIN

CLK

CLK

U6-

Reset

Reset

Reset

Bank A

N-2

tap

N-6

N-1

550ps

2.5 CLK Cycles

of Latency

N

N+1

N+2

550ps

INTERLEAVED DATA OUTPUT

N-4

Invalid Data

Bank B

N-5

tpd3

Bank A

N-6

N-2

PARALLEL DATA OUTPUT

Invalid Data

Bank B

N-5

DCLKOUT

DCLKOUT

N-2

tpd3

tpd1

N-1

N+3

N+4

tpd1

N+1

N

N-1

N

Data Output Possibilities w/o Reset

Figure 2. Dual Mode Timing Diagram

8

Rev. 1.0.2 December 2002

Share Link: