ST16654 查看數據表（PDF） - Exar Corporation

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ST16654

QUAD UART WITH 64-BYTE FIFO AND INFRARED (IrDA) ENCODER/DECODER

Exar Corporation 

ST16C654/654D

SYMBOL DESCRIPTION

Symbol

INTSEL

-IOR

-IOW

-IRQ

Pin

Signal

68 100 64 type

Pin Description

dition exists. Interrupt conditions include: receiver errors,

available receiver buffer data, transmit buffer empty, or

when a modem status flag is detected. When the 68 mode

is selected, the functions of these pins are reassigned. 68

mode functions are described under the their respective

name/pin headings.

65 87

-

I Interrupt Select. (active high, with internal pull-down) - This

function is associated with the 16 mode only. When the 16

mode is selected, this pin can be used in conjunction with

MCR bit-3 to enable or disable the three state interrupts, INT

A-D or override MCR bit-3 and force continuous interrupts.

Interrupt outputs are enabled continuously by making this

pin a logic 1. Making this pin a logic 0 allows MCR bit-3 to

control the three state interrupt output. In this mode, MCR

bit-3 is set to a logic “1” to enable the three state outputs.

This pin is disabled in the 68 mode. Due to pin limitations on

64 pin packages, this pin is not available. To cover this

limitation, two 64 pin QFP package versions are offered.

The ST16C654DCQ64 operates in the continuos interrupt

enable mode by bonded this pin to VCC internally. The

ST16C654CQ64 operates with MCR bit-3 control by bond-

ing this pin to GND.

52 66 40

I Input/Output Read. (active low Strobe) - This function is

associated with the 16 mode only. A logic 0 transition on this

pin will load the contents of an Internal register defined by

address bits A0-A2 onto the ST16C654 data bus (D0-D7) for

access by an external CPU. This pin is disabled in the 68

mode.

18 15

9

I Input/Output Write. (active low strobe) - This function is

associated with the 16 mode only. A logic 0 transition on this

pin will transfer the contents of the data bus (D0-D7) from

the external CPU to an internal register that is defined by

address bits A0/A2. When the 16 mode is selected (68/100

pin devices), this pin functions as R/-W, see definition under

R/W.

15 12

-

O Interrupt Request or Interrupt “A” - This function is associ-

Rev. 4.10

5-71

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