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T80C5112 查看數據表(PDF) - Atmel Corporation

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T80C5112
Atmel
Atmel Corporation Atmel
T80C5112 Datasheet PDF : 97 Pages
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8-bit Microcontroller with A/D converter
T80C5112
1. Description
The T80C5112 is a high performance ROM/OTP version
of the 80C51 8-bit microcontroller.
The T80C5112 retains all the features of the standard
80C51 with 8 Kbytes ROM/OTP program memory, 256
bytes of internal RAM, a 8-source , 4-level interrupt
system, an on-chip oscillator and two timer/counters.
The T80C5112 is dedicated for analog interfacing
applications. For this, it has an 10-bit, 8 channels A/D
converter and a five channels Programmable Counter
Array.
In addition, the T80C5112 has a Hardware Watchdog
Timer with its own low power oscillator, a versatile
serial channel that facilitates multiprocessor
communication (EUART) with an independent baud rate
generator, a SPI serial bus controller and a X2 speed
improvement mechanism. The X2 feature allows to keep
the same CPU power at a divided by two oscillator
frequency.
The fully static design of the T80C5112 allows to reduce
system power consumption by bringing the clock
frequency down to any value, even DC, without loss of
data.
The T80C5112 has 3 software-selectable modes of
reduced activity for further reduction in power
consumption. In the idle mode the CPU is frozen while
the peripherals are still operating. In the quiet mode, the
A/D converter only is operating. In the power-down
mode the RAM is saved and all other functions are
inoperative. Two oscillators source, crystal and RC,
provide a versatile power management.
The T80C5112 is proposed in 48/52 pin count packages
with Port 0 and Port 2 (address / data busses).
2. Features
· 80C51 Compatible
· Crystal or ceramic oscillator with hardware set
· Five I/O ports
up (32 KHz or 33/40 MHz)
· Two 16-bit timer/counters
· Internal RC oscillator (12 MHz)
· 256 bytes RAM
· Programmable prescaler
· 8Kbytes ROM/OTP program memory with 64 bytes
encryption array and 3 security levels.
· Active oscillator during reset defined by hardware
set up
· High-Speed Architecture
· 33MHz @ 5V (66 MHz equivalent)
· Timer 0 subclock mode for Real Time Clock.
· Programmable counter array with High speed output,
Compare / Capture, Pulse Width Modulation and
· 20MHz @ 3V (40 MHz equivalent)
Watchdog timer capabilities
· X2 Speed Improvement capability (6 clocks/ · Interrupt Structure with:
·
·
machine cycle)
10-bit, 8 channels A/D converter
Hardware Watchdog Timer with integrated low
power oscillator (20m A) and Reset-Out
·
· 8 Interrupt sources,
· 4 interrupt priority levels
Power Control modes:
· Programmable I/O mode: standard C51, input only,
· Idle mode
push-pull, open drain.
· Power-down mode
· Asynchronous port reset, Power On Reset
· Power-off Flag, Power fail detect, Power on Reset
· Full duplex Enhanced UART with baud rate generator · Power supply: 2.7 to 5.5V
· SPI, master/slave mode
· Temperature ranges: Commercial (0 to 70C) and
Industrial (-40 to 85 C), optionnal extented
· Dual system clock
· Package:LQFP48 (body 7*7*1.4mm), PLCC52
Rev. B - November 10, 2000
1
Preliminary

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