ADG714(Rev0) 查看數據表（PDF） - Analog Devices

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ADG714
(Rev.:Rev0)

CMOS, Low Voltage Serially-Controlled, Octal SPST Switches

Analog Devices 

ADG714/ADG715

Pin No.

1

Mnemonic

SCLK

2

VDD

3

DIN

4

5, 7, 9, 11, 14,

16, 18, 20

6, 8, 10, 12, 13,

15, 17, 19

21

22

GND

Sx

Dx

VSS

DOUT

23

RESET

24

SYNC

ADG714 PIN FUNCTION DESCRIPTIONS

Description

Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial

clock input. These devices can accommodate serial input rates of up to 30 MHz.

Positive Analog Supply Voltage.

Serial Data Input. Data is clocked into the 8-bit input register on the falling edge of the serial

clock input.

Ground Reference.

Source. May be an input or output.

Drain. May be an input or output.

Negative Analog Supply Voltage. For single supply operation this should be tied to GND.

Serial Data Output. This allows a number a parts to be daisy chained. Data is clocked out of

the input shift register on the rising edge of SCLK. DOUT is an open-drain output that should be

pulled to the supply with an external pull-up resistor.

Active Low Control Input. Clears the input register and turns all switches to the OFF condition.

Active Low Control Input. This is the frame synchronization signal for the input data. When

SYNC goes low, it powers on the SCLK and DIN buffers and the input shift register is enabled.

Data is transferred on the falling edges of the following clocks. Taking SYNC high updates the

switches.

Pin No.

1

2

3

Mnemonic

SCL

VDD

SDA

4

5, 7, 9, 11, 14,

16, 18, 20

6, 8, 10, 12, 13,

15, 17, 19

21

22

23

24

GND

Sx

Dx

VSS

A1

RESET

A0

ADG715 PIN FUNCTION DESCRIPTIONS

Description

Serial Clock Line. This is used in conjunction with the SDA line to clock data into the 8-bit input

shift register. Clock rates of up to 400 kbit/s can be accommodated with this 2-wire serial interface.

Positive Analog Supply Voltage.

Serial Data Line. This is used in conjunction with the SCL line to clock data into the 8-bit input

shift register during the write cycle and used to readback one byte of data during the read cycle. It

is a bidirectional open-drain data line which should be pulled to the supply with an external pull-

up resistor.

Ground Reference.

Source. May be an input or output.

Drain. May be an input or output.

Negative Analog Supply Voltage. For single supply operation this should be tied to GND.

Address Input. Sets the second least significant bit of the 7-bit slave address.

Active Low Control Input. Clears the input register and turns all switches to the OFF condition.

Address Input. Sets the least significant bit of the 7-bit slave address.

–8–

REV. 0

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