UPD16835 查看數據表（PDF） - NEC => Renesas Technology
零件编号
产品描述 (功能)
比赛名单
UPD16835 Datasheet PDF : 33 Pages
| |||
µPD16835
<4th byte>
Bit
Data
Function
Setting
D7 1 or 0
OSCSEL
Internal/external
D6 0
-
-
D5 0
-
-
D4
Chopping
D3
D2 5-bit data Chopping
input
D1
Frequency
D0
frequency :
32 to 124 kHz
Setting
(8 to 31)Note
∆f = 4 kHz
Note The frequency is 0 kHz if 0 to 7 is input.
<5th byte>
Bit
Data
EXTα
EXTβ
D7 0
D6 Note 5
D5 Note 5
D4 Note 5
D3 Note 5
D2 Note 5
D1 Note 5
D0 Note 5
-
ENABLE α Note1
ROTATION αNote2
Pulse Out α
FF7 α
FF3 α
Checksum Note3
Chopping Note4
-
ENABLE β Note1
ROTATION β Note2
Pulse Out β
FF7 β
FF3 β
FF2 β
FF1 β
Notes 1. H level : Conducts, L level : Stops
2. H level : Reverse (CCW),
L level : Forward (CW)
3. H level : Normal data input,
L level : Abnormal data input
4. Not output in internal oscillation mode.
5. Select one of D0 to D6 and input “1”.
If two or more of D0 to D6 are selected,
they are positively ORed for output.
<6th byte>
Bit
Data
Function
Setting
D7
D6 4-bit data α ch
D5 input
Current Set2
D4
α ch Output
current setting 2
EVR : 100 to 250 mV
Setting (0 to 15) Note
D3
D2 4-bit data α ch
D1 input
Current Set1
D0
α ch Output
current setting 1
EVR : 100 to 250 mV
Setting (0 to 15) Note
Note A voltage of about double EVR is output to
the FIL pin.
<4th byte>
Bit
Data
Function
D7
1 or 0
Current Set α
D6
15-bit data
D5
D4
D3
High-order α Pulse Width
D2
8-bit data
D1
input
D0
Setting
set2/set1
α ch
pulse cycle :
0.25 to 8191.75 µs
Setting
(1 to 32767)
∆t = 0.25 µs
<5th byte>
Bit
Data
Function
Setting
D7
1 or 0
D6
1 or 0
β ROTATION
β ENABLE
β ch CCW/CW
β ch ON/OFF
D5
β ch
D4
D3
6-bit data
Number of
D2
input
β Pulse Number
pulses in 1 VD
Setting (1 to 63)
D1
∆n = 4 pulses Note
D0
Note The number of pulses can be varied in 4-pulse
steps.
<6th byte>
Bit
Data
D7
15-bit data
D6
D5
D4
D3
Low-order
D2
8-bit data
D1
input
D0
Function
β Pulse Width
Setting
β ch pulse
cycle:
0.25 to 8191.75 µs
Setting
(1 to 32767)
∆t = 0.25 µs
10
Data Sheet G11594EJ2V0DS00
Share Link: 