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UPD78C14L 查看數據表(PDF) - NEC => Renesas Technology

零件编号
产品描述 (功能)
比赛名单
UPD78C14L
NEC
NEC => Renesas Technology NEC
UPD78C14L Datasheet PDF : 52 Pages
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µPD78C14(A)
2. PIN FUNCTIONS
2.1 Pin Function List
Pin
PA7-PA0
(Port A)
PB7-PB0
(Port B)
PC0/TxD
PC1/RxD
PC2/SCK
PC3/INT2/TI
PC4/TO
PC5/CI
PC6/CO0
PC7/CO1
PD7-PD0/
AD7-AD0
PF7-PF0/
AB15-AB8
WR
(Write
Strobe)
Input/Output
Input/Output
Input/Output
Input/Output,
Output
Input/Output,
Input
Input/Output,
Input/Output
Input/Output,
Input, Input
Input/Output,
Output
Input/Output,
Input
Input/Output,
Output
Input/Output,
Input/Output
Input/Output,
Output
Output
Function
These 8 pins constitute an 8-bit I/O port and input/output can be specified in bit
units.
These 8 pins constitute an 8-bit I/O port and input/output can be specified in bit
units.
Port C
Transmit Data
These 8 pins constitute an 8-bit I/O This pin outputs serial data.
port and input/output can be specified Receive Data
in bit units.
This pin inputs serial data.
Serial Clock
This pin inputs/outputs serial clock. It be-
comes an output pin when an internal
clock is used or an input pin when an
external clock is used.
Interrupt Request/Timer Input
This pin inputs edge triggering (falling
edge) maskable interrupt or external
clock for timer. This pin is also shared
with zero-cross detection pin for AC input.
Timer Output
This pin outputs square waves in which
one cycle of the internal clock forms a
half cycle, indicating the timer’s counting
time.
Counter Input
This pin inputs external pulse for timer/
event counter.
Counter Output 0,1
This pin outputs programmable square
wave by timer/event counter.
Port D
Address/Data Bus
These 8 pins constitute an 8-bit I/O These pins function as multiplexed
port and input/output can be
address/data bus when using an
specified in byte units.
external memory.
Port F
Address Bus
These 8 pins constitute an 8-bit I/O These pins function as address bus when
port and input/output can be specified using an external memory.
in bit units.
This is a strobe signal output to write data in external memory. This signal
becomes high level except during the data write machine cycle for external memory.
This signal becomes output high impedance when the RESET signal is low or in
the hardware STOP mode.
7

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