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UTCMC34118 查看數據表(PDF) - Unisonic Technologies

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UTCMC34118
UTC
Unisonic Technologies UTC
UTCMC34118 Datasheet PDF : 13 Pages
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UTCMC34118 LINEAR INTEGRATED CIRCUIT
operated by the level detectors, 2 from the background noise monitors, the volume control, the dial-tone detector,
and the AGC circuit. These 7 inputs are described below.
LEVEL DETECTORS
There are four level detectors-two on the receive side and two on the transmit side. Refer to Figure 3-the terms in
parentheses form one system, and the other terms form the second system. Each level detector is a high amplifier
with back-to-back diodes in the feedback path, resulting in non-linear gain, which permits operation over a wide
dynamic range of speech levels. The sensitivity of each level detector is determined by the external resistor and
capacitor at each input( TLI1, TLI2, RLI1, and RLI2). Each output charges an external capacitor through a diode and
limiting resistor, thus providing a DC representation of the input AC signal level. The outputs have a quick rise
time( determined by the capacitor and an internal 350resistor), and a slow decay time set by an internal current
source and the capacitor. The capacitors on the four outputs should have the same value (+-10%) to prevent timing
problems. Referring to the Block Diagram, on the receive side, one level detector(RLI1) is at the receive input
receiving the same signal as at Tip and Ring, and the other(RLI2) is at the output of the speaker amplifier. On the
transmit side, one level detector(TLI2) is at the microphone amplifier, while the other(TLI1) is at the hybrid output.
Outputs RLO1 and TLO1 feed a comparator, the output of which goes to the attenuator Control Block. Likewise,
outputs RLO2 feed a second comparator which also to the attenuator Control Block. The truth table for the effects of
the level detectors on the Control Block is given in the section describing the Control Block.
BACKGROUND NOISE MONITORS
The purpose of the background noise monitors is to distinguish speech( which consists of bursts) from background
noise( a relatively constant signal level). There are two background noise monitors- one for the receive path and one
for the transmit path. Referring to Figure 3, the receive background noise monitor is operated on by the RLI1-RLO1
level detector, while the transmit background noise monitor is operated on by the TLI2-TLO2 level detector. They
monitor the background noise by storing a DC voltage representative of the respective noise levels in capacitors at
CPR and CPT. The voltage at these pins have slow rise times( determined by the external RC), but fast decay times.
If the signal at RLI1( or TLI2) changes slowly, the voltage at CPR( or CPT) will remain more positive than the voltage
at the non-inverting input of the monitor’s output comparator. When speech is present, the voltage on the
non-inverting input of the comparator will rise quicker than the voltage at the inverting input( due to the burst
characteristic of speech), causing its output to change. This output is sensed by the attenuator Control Block. The 36
mV offset at the comparator’s input keeps the comparator from changing state unless the speech level exceeds the
background noise by ~4dB. The time constant of the external RC( ~4.7seconds) determines the response time to
background noise variations.
UTC
UNISONIC TECHNOLOGIES CO., LTD. 8
QW-R108-007,A

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