W83194BR-PT 查看數據表（PDF） - Winbond

零件编号

产品描述 (功能)

比赛名单

W83194BR-PT

STEPLESS VIA PT MAIN CLOCK GENERATOR

Winbond 

W83194BR-PT

7. I2C CONTROL AND STATUS REGISTERS

7.1 Register 0: Frequency Select (Default = C4h)

BIT

NAME

PWD

DESCRIPTION

7

SSEL [3]

1

6

SSEL [2]

5

SSEL [1]

1

Frequency selection by software via I2C

0

4

SSEL [0]

0

Enable software program FS [4:0].

3 EN_SSEL

0 0 = Select frequency by hardware.

1= Select frequency by software I2C - Bit 7~ 4, 2.

2

SSEL [4]

1 EN_SPSP

0

EN_SAFE_

FREQ

1 Frequency selection bit 4

Enable Spread Spectrum in the frequency table.

0 0 = Normal

1 = Spread Spectrum enabled

Enable reload safe frequency when the watchdog is timeout.

0 0 = reload the FS [4:0] latched pins when watchdog time out.

1 = reload the safe frequency bit defined at Register 5 bit 4~0.

7.2 Register 1: CPU Clock Control (1 = Enable, 0 = Stopped) (Default = E3h)

BIT

PIN NO

PWD

DESCRIPTION

7

42, 41

1 CPUT / C_CS output control

6

35, 34

1 CPUCLKT1 / C1 output control

5

40, 39

1 CPUCLKT0 / C0 output control

4

-

0 Reserved. Default: 0 (Read only)

3

-

X Invert Power on latched value of FS3 pin. Default: 0 (Read only)

2

-

X Invert Power on latched value of FS2 pin. Default: 0 (Read only)

1

-

X Invert Power on latched value of FS1 pin. Default: 1 (Read only)

0

-

X Invert Power on latched value of FS0 pin. Default: 1 (Read only)

Publication Release Date: April 13, 2005

-7-

Revision 1.1

Share Link: