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W83194BR-PT 查看數據表(PDF) - Winbond

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W83194BR-PT Datasheet PDF : 24 Pages
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W83194BR-PT
5.3 I2C Control Interface
PIN PIN NAME TYPE
DESCRIPTION
29 SDATA* I/OD Serial data of I2C 2-wire control interface with internal pull-up resistor.
28 SCLK*
IN Serial clock of I2C 2-wire control interface with internal pull-up resistor.
5.4 Fixed Frequency Outputs
PIN PIN NAME TYPE
DESCRIPTION
REF
OUT 14.318MHz output.
Latched input for 24MHz or 48MHz select pin. This is internal 120K
1
SEL24_48&
INtd120k
pull down default 48MHz. In power on reset period, it is a hardware-
latched pin, and it can be R/W by I2C control after power on reset
period. Select by register 15 bit 7.
48MHz OUT 48MHz clock output for USB.
7
FS3*
INtp120k
Latched input for FS3 at initial power up for H/W selecting the output
frequency. This is internal 120K pull up.
24 or 48MHz (default) clock output, In power on reset period, it is a
24_48MHz OUT hardware-latched pin, and it can be R/W by I2C control after power on
8
reset period. Select by register 15 bit 7.
FS2*
INtp120k
Latched input for FS2 at initial power up for H/W selecting the output
frequency. This is internal 120K pull up.
5.5 Power Management Pins
PIN PIN NAME TYPE
DESCRIPTION
Power good input signal comes from ACPI with LOW active. This 3.3V
33
VTT_PWR
GD#
IN
input is level sensitive strobe used to determine FS [4:0] and
MULTISEL input are valid and is ready to sample. This pin is LOW
active.
32
Ratio_1
OUT
Gear ratio output to chipset. This output can replace CPU BSEL
signal.
31
Ratio_0
OUT
Gear ratio output to chipset. This output can replace CPU BSEL
signal.
Deciding the reference current for the CPUCLK pairs. The pin was
connected to the precision resistor tied to ground to decide the
37
IREF
OUT appropriate current. There are several modes to select different
current via power on trapping the Pin 12 (MULTISEL0). The table is
show as follows.
30
RESET#
OD
System reset signal when the watchdog is time out. This pin will
generate 250ms low phase when the watchdog timer is timeout.
22
PD#*
IN
Power Down Function. This is power down pin, low active (PD#).
Internal 120K pull up
-4-

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