W83195BR-101 查看數據表（PDF） - Winbond

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W83195BR-101

Winbond Clock Generator For Intel 915/925 Chipsets

Winbond 

W83195BR/G-101

STEPLESS FOR INTEL 915/925 CHIPSETS

7.20 Register 19: Reserved (Default: DAh)

7.21 Register 20: Watch dog timer (Default: 88h)

BIT

NAME

PWD

DESCRIPTION

7 Reserved

1 Reserved

6 WD_TIME [6]

0

5 WD_TIME [5]

0

4 WD_TIME [4]

3 WD_TIME [3]

2 WD_TIME [2]

0 Setting the down count depth (Failure decision). One bit

1

resolution represents 250ms. Default time depth is

8*250ms = 2.0 second. If the watchdog timer is counting,

0 this register will return present down count value.

1 WD_TIME [1]

0

0 WD_TIME [0]

0

TYPE

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

7.22 Register21: Control (Default: 4Bh)

BIT

NAME

PWD

DESCRIPTION

7 Tri-state

0 Tri-state all output if set 1

6 Reserved

1 Reserved

5 Reserved

0 Reserved

4 Reserved

0 Reserved

3 Reserved

1 Reserved

2 Reserved

0 Reserved

1 Reserved

1 Reserved

0 Reserved

1 Reserved

TYPE

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

- 15 -

Publication Release Date: March 2006

Revision 0.7

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