STL24N60M2(2014) 查看數據表（PDF） - STMicroelectronics

零件编号

产品描述 (功能)

比赛名单

STL24N60M2
(Rev.:2014)

N-channel 600 V, 0.186 Ω typ., 18 A MDmesh II Plus™ low Qg Power MOSFET in a PowerFLAT™ 8x8 HV package

STMicroelectronics 

Electrical characteristics

2

Electrical characteristics

STL24N60M2

(TC = 25 °C unless otherwise specified)

Symbol

Parameter

Table 5. On /off states

Test conditions

Drain-source

V(BR)DSS breakdown voltage

VGS = 0, ID = 1 mA

Zero gate voltage

IDSS

drain current

IGSS

Gate-body leakage

current

VGS = 0, VDS = 600 V

VGS = 0,

VDS = 600 V, TC=125 °C

VDS = 0, VGS = ± 25 V

VGS(th)

RDS(on)

Gate threshold voltage VDS = VGS, ID = 250 μA

Static drain-source on-

resistance

VGS = 10 V, ID = 9 A

Min. Typ. Max. Unit

600

V

1 μA

100 μA

±10 μA

2

3

4V

0.186 0.21 Ω

Symbol

Parameter

Table 6. Dynamic

Test conditions

Min. Typ. Max. Unit

Ciss

Coss

Crss

Input capacitance

Output capacitance

Reverse transfer

capacitance

VDS = 100 V, f = 1 MHz,

VGS = 0

- 1060 - pF

-

55

- pF

2.2

-

- pF

(1) Equivalent output

Coss eq. capacitance

VDS = 0 to 480 V, VGS = 0

- 258 - pF

Intrinsic gate

RG resistance

f = 1 MHz open drain

-

7

-

Ω

Qg Total gate charge

VDD = 480 V, ID = 18 A,

Qgs Gate-source charge VGS = 10 V

Qgd Gate-drain charge

(see Figure 15)

-

29

- nC

-

6

- nC

-

12

- nC

1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS

increases from 0 to 80% VDSS

4/15

DocID024777 Rev 2

Share Link: