VND670SP(2003) 查看數據表（PDF） - STMicroelectronics

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VND670SP
(Rev.:2003)

DUAL HIGH SIDE SWITCH WITH DUAL POWER MOS GATE DRIVER (BRIDGE CONFIGURATION)

STMicroelectronics 

VND670SP

WAVEFORMS AND TRUTH TABLE (CONTINUED)

In case of a fault condition the DIAGX/ENX pin is considered as an output pin by the device.

The fault conditions are:

- overtemperature on one or both high sides;

- short to battery condition on the output (saturation detection on the external connected Power

MOSFET).

Possible origins of fault conditions may be:

OUTA is shorted to ground ---> overtemperature detection on high side A.

OUTA is shorted to VCC ---> external Power MOSFET saturation detection (driven by GATEA).

When a fault condition is detected, the user can know which power element is in fault by monitoring the INA, INB, DIAGA/

ENA and DIAGB/ENB pins.

In any case, when a fault is detected, the faulty half bridge is latched off. To turn-on the respective output (GATEX or

OUTX) again, the input signal must rise from low to high level.

TRUTH TABLE IN FAULT CONDITIONS (detected on OUTA)

INA

INB

DIAGA/ENA DIAGB/ENB

1

1

0

1

1

0

0

1

0

1

0

1

0

0

0

1

X

X

0

0

1

X

0

0

0

X

0

0

X

1

0

1

X

0

0

1

OUTA

OPEN

OPEN

OPEN

OPEN

OPEN

OPEN

OPEN

OPEN

OPEN

OUTB

H

OPEN

H

OPEN

OPEN

OPEN

OPEN

H

OPEN

GATEA

L

L

L

L

L

L

L

L

L

GATEB

L

L

L

L

L

L

L

L

L

Fault Information

Protection Action

TEST MODE

The PWM pin allows to test the load connection between two half-bridges. In the test mode (Vpwm=-2V) the external

Power Mos gate drivers are disabled. The INA or INB inputs allow to turn-on the High Side A or B, respectively, in order

to connect one side of the load at VCC voltage. The check of the voltage on the other side of the load allow to verify the

continuity of the load connection. In case of load disconnection the DIADX/ENX pin corresponding to the faulty output is

pulled down.

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