TDA9851T/V1 查看數據表（PDF） - Philips Electronics

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TDA9851T/V1

I2C-bus controlled economic BTSC stereo decoder

Philips Electronics 

Philips Semiconductors

I2C-bus controlled economic BTSC stereo

decoder

Product specification

TDA9851

I2C-BUS PROTOCOL

I2C-bus format to read (slave transmits data)

S

SLAVE ADDRESS

R/W

A

DATA

Table 1 Explanation of I2C-bus format to read (slave transmits data)

NAME

S

Standard SLAVE ADDRESS (MAD)

R/W

A

DATA

P

DESCRIPTION

START condition; generated by the master

101 101 1

logic 1 (read); generated by the master

acknowledge; generated by the slave

slave transmits an 8-bit data word

STOP condition; generated by the master

Table 2 Definition of the transmitted bytes after read condition

MSB

D7

D6

D5

D4

D3

D2

D1

Y

Y

Y

Y

Y

Y

Y

Table 3 Function of the bits in Table 2

BITS

STP

Y

FUNCTION

stereo pilot identification (stereo received = 1)

indefinite

I2C-bus format to write (slave receives data)

S

SLAVE ADDRESS

R/W

A

DATA

A

Table 4 Explanation of I2C-bus format to write (slave receives data)

NAME

S

Standard SLAVE ADDRESS (MAD)

R/W

A

DATA

P

DESCRIPTION

START condition

101 101 1

logic 0 (write)

acknowledge; generated by the slave

see Table 5

STOP condition

Table 5 Definition of the DATA (second byte after MAD)

MSB

D7

D6

D5

D4

0

0

AT2

AT1

D3

CCD

D2

AVLON

D1

GMU

P

LSB

D0

STP

P

LSB

D0

STEREO

1997 Nov 12

10

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