STF7NM60N(2018) 查看數據表（PDF） - STMicroelectronics

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STF7NM60N
(Rev.:2018)

N-channel 600 V, 0.8 Ω typ., 5 A MDmesh™ II Power MOSFETs in DPAK, TO-220FP and IPAK packages

STMicroelectronics 

STD7NM60N, STF7NM60N, STU7NM60N

Electrical characteristics

2

Electrical characteristics

(TCASE = 25 °C unless otherwise specified)

Table 4. On/off states

Symbol

Parameter

Test conditions

V(BR)DSS

Drain-source

breakdown voltage

ID = 1 mA, VGS = 0 V

IDSS

IGSS

Zero gate voltage drain

current

Gate body leakage

current

VGS = 0 V, VDS = 600 V

VGS = 0 V, VDS = 600 V, TC = 125 °C (1)

VDS = 0 V, VGS = ±20 V

VGS(th)

RDS(on)

Gate threshold voltage

Static drain-source on

resistance

VDS = VGS, ID = 250 µA

VGS = 10 V, ID = 2.5 A

1. Defined by design, not subject to production test.

Min. Typ. Max. Unit

600

V

1

µA

100

µA

100

nA

2

3

4

V

0.8

0.9

Ω

Table 5. Dynamic

Symbol

Parameter

Test conditions

Min. Typ. Max. Unit

Ciss

Input capacitance

363

Coss

Crss

Output capacitance

Reverse transfer

capacitance

VDS = 50 V, f = 1 MHz, VGS = 0 V

-

24.6

-

pF

1.1

Coss eq. (1)

Equivalent capacitance

time related

VDS = 0 to 480 V, VGS = 0 V

-

130

-

pF

RG

Intrinsic gate resistance f = 1 MHz open drain

-

5.4

-

Ω

Qg

Total gate charge

VDD = 480 V, ID = 5 A, VGS = 0 to 10 V

14

Qgs

Gate-source charge

(see Figure 14. Test circuit for gate charge

-

2.7

-

nC

Qgd

Gate-drain charge

behavior)

7.7

1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0

to 80% VDSS.

Symbol

td(on)

tr

td(off)

tf

Parameter

Turn-on delay time

Rise time

Turn-off delay time

Fall time

Table 6. Switching times

Test conditions

Min. Typ. Max. Unit

VDD = 300 V, ID = 2.5 A,

7

RG = 4.7 Ω, VGS = 10 V

10

(see Figure 13. Test circuit for resistive load

-

26

-

ns

switching times and Figure 18. Switching

time waveform)

12

DS6523 - Rev 5

page 3/26

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