HEF4081B-Q100 查看數據表（PDF） - NXP Semiconductors.
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HEF4081B-Q100 Datasheet PDF : 11 Pages
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Nexperia
HEF4081B-Q100
Quad 2-input AND gate
10. Dynamic characteristics
Table 7. Dynamic characteristics
Tamb = 25 C; for waveforms see Figure 4; for test circuit, see Figure 5; unless otherwise specified. [1]
Symbol Parameter
Conditions VDD
Extrapolation formula Min Typ Max Unit
tPHL
HIGH to LOW
nA or nB to nY 5 V
propagation delay
10 V
28 ns + (0.55 ns/pF)CL
14 ns + (0.23 ns/pF)CL
- 55
- 25
110 ns
50
ns
15 V
12 ns + (0.16 ns/pF)CL
- 20
40
ns
tPLH
LOW to HIGH
nA or nB to nY 5 V
propagation delay
10 V
18 ns + (0.55 ns/pF)CL
9 ns + (0.23 ns/pF)CL
- 45
90
ns
- 20
40
ns
15 V
7 ns + (0.16 ns/pF)CL
- 15
30
ns
tTHL
HIGH to LOW output
transition time
5V
10 V
10 ns + (1.0 ns/pF)CL
9 ns + (0.42 ns/pF)CL
- 60
- 30
120 ns
60
ns
15 V
6 ns + (0.28 ns/pF)CL
- 20
40
ns
tTLH
LOW to HIGH output
transition time
5V
10 V
10 ns + (1.00 ns/pF)CL
9 ns + (0.42 ns/pF)CL
- 60
- 30
120 ns
60
ns
15 V
6 ns + (0.28 ns/pF)CL
- 20
40
ns
[1] The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).
Table 8. Dynamic power dissipation
VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol Parameter
VDD Typical formula
where:
PD
dynamic power dissipation 5 V PD = 450 fi + (fo CL) VDD2 (W) fi = input frequency in MHz;
10 V
15 V
PD = 2900 fi + (fo CL) VDD2 (W)
PD = 11700 fi + (fo CL) VDD2 (W)
fo = output frequency in MHz;
CL = output load capacitance in pF;
(fo CL) = sum of the outputs;
VDD = supply voltage in V.
HEF4081B_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 13 November 2013
© Nexperia B.V. 2017. All rights reserved
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