LC863448A 查看數據表（PDF） - SANYO -> Panasonic

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LC863448A

8-BIT SINGLE CHIP MICROCONTROLLER

SANYO -> Panasonic 

LC863448A/40A

Recommended Oscillation Circuit and Sample Characteristics

The sample oscillation circuit characteristics in the table below is based on the following conditions:

• Recommended circuit parameters are verified by an oscillator manufacturer using a Sanyo provided

oscillation evaluation board.

• Sample characteristics are the result of the evaluation with the recommended circuit parameters connected

externally.

Recommended oscillation circuit and sample characteristics (Ta = -10 to +70°C)

Frequency Manufacturer Oscillator

Recommended circuit

parameters

Operating

supply voltage

range

C1 C2 Rf Rd

32.768kHz Seiko Epson C-002RX T.B.D T.B.D T.B.D T.B.D 4.5 – 5.5V

Oscillation

stabilizing

time

typ. max

T.B.D T.B.D

Notes

Notes The oscillation stabilizing time period is the time until the VCO oscillation for the internal system

becomes stable after the following conditions. (Refer to Figure 2.)

1. The VDD becomes higher than the minimum operating voltage after the power is supplied.

2. The HOLD mode is released.

The sample oscillation circuit characteristics may differ applications. For further assistance, please contact

with oscillator manufacturer with the following notes in your mind.

• Since the oscillation frequency precision is affected by wiring capacity of the application board, etc., adjust

the oscillation frequency on the production board.

• The above oscillation frequency and the operating supply voltage range are based on the operating

temperature of -10°C to +70°C. For the use with the temperature outside of the range herein, or in the

applications requiring high reliability such as car products, please consult with oscillator manufacturer.

• When using the oscillator which is not shown in the sample oscillation circuit characteristics, please

consult with Sanyo sales personnel.

Since the oscillation circuit characteristics are affected by the noise or wiring capacity because the circuit is

designed with low gain in order to reduce the power dissipation, refer to the following notices.

• The distance between the clock I/O terminal (XT1 terminal XT2 terminal) and external parts should be as

short as possible.

• The capacitors’ VSS should be allocated close to the microcontroller’s GND terminal and be away from

other GND.

• The signal lines with rapid state changes or with large current should be allocated away from the

oscillation circuit.

XT1

C1

Rf

X’tal

XT2

Rd

C2

Figure 1 Recommended oscillation circuit.

15/20

Ver. 0.90

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